| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | uvd_v7_0.c | 871 ~UVD_MASTINT_EN__VCPU_EN_MASK, 0); in uvd_v7_0_sriov_start()
908 ~(UVD_MASTINT_EN__VCPU_EN_MASK|UVD_MASTINT_EN__SYS_EN_MASK), in uvd_v7_0_sriov_start()
909 (UVD_MASTINT_EN__VCPU_EN_MASK|UVD_MASTINT_EN__SYS_EN_MASK)); in uvd_v7_0_sriov_start()
984 ~UVD_MASTINT_EN__VCPU_EN_MASK); in uvd_v7_0_start()
1075 (UVD_MASTINT_EN__VCPU_EN_MASK|UVD_MASTINT_EN__SYS_EN_MASK), in uvd_v7_0_start()
1076 ~(UVD_MASTINT_EN__VCPU_EN_MASK|UVD_MASTINT_EN__SYS_EN_MASK)); in uvd_v7_0_start()
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| H A D | vcn_v1_0.c | 849 ~UVD_MASTINT_EN__VCPU_EN_MASK); in vcn_v1_0_start_spg_mode()
939 UVD_MASTINT_EN__VCPU_EN_MASK, ~UVD_MASTINT_EN__VCPU_EN_MASK); in vcn_v1_0_start_spg_mode()
1031 0, UVD_MASTINT_EN__VCPU_EN_MASK, 0); in vcn_v1_0_start_dpg_mode()
1085 UVD_MASTINT_EN__VCPU_EN_MASK, UVD_MASTINT_EN__VCPU_EN_MASK, 0); in vcn_v1_0_start_dpg_mode()
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| H A D | vcn_v4_0_5.c | 954 UVD_MASTINT_EN__VCPU_EN_MASK, 0, indirect); in vcn_v4_0_5_start_dpg_mode()
1033 ~UVD_MASTINT_EN__VCPU_EN_MASK); in vcn_v4_0_5_start()
1136 UVD_MASTINT_EN__VCPU_EN_MASK, in vcn_v4_0_5_start()
1137 ~UVD_MASTINT_EN__VCPU_EN_MASK); in vcn_v4_0_5_start()
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| H A D | vcn_v2_0.c | 923 UVD_MASTINT_EN__VCPU_EN_MASK, 0, indirect); in vcn_v2_0_start_dpg_mode()
1001 ~UVD_MASTINT_EN__VCPU_EN_MASK); in vcn_v2_0_start()
1091 UVD_MASTINT_EN__VCPU_EN_MASK, in vcn_v2_0_start()
1092 ~UVD_MASTINT_EN__VCPU_EN_MASK); in vcn_v2_0_start()
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| H A D | vcn_v2_5.c | 958 UVD_MASTINT_EN__VCPU_EN_MASK, 0, indirect); in vcn_v2_5_start_dpg_mode()
1050 ~UVD_MASTINT_EN__VCPU_EN_MASK); in vcn_v2_5_start()
1146 UVD_MASTINT_EN__VCPU_EN_MASK, in vcn_v2_5_start()
1147 ~UVD_MASTINT_EN__VCPU_EN_MASK); in vcn_v2_5_start()
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| H A D | vcn_v3_0.c | 1076 UVD_MASTINT_EN__VCPU_EN_MASK, 0, indirect); in vcn_v3_0_start_dpg_mode()
1172 ~UVD_MASTINT_EN__VCPU_EN_MASK); in vcn_v3_0_start()
1263 UVD_MASTINT_EN__VCPU_EN_MASK, in vcn_v3_0_start()
1264 ~UVD_MASTINT_EN__VCPU_EN_MASK); in vcn_v3_0_start()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| H A D | uvd_7_0_sh_mask.h | 490 #define UVD_MASTINT_EN__VCPU_EN_MASK … macro
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| H A D | uvd_3_1_sh_mask.h | 323 #define UVD_MASTINT_EN__VCPU_EN_MASK 0x2 macro
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| H A D | uvd_4_2_sh_mask.h | 327 #define UVD_MASTINT_EN__VCPU_EN_MASK 0x2 macro
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| H A D | uvd_4_0_sh_mask.h | 424 #define UVD_MASTINT_EN__VCPU_EN_MASK 0x00000002L macro
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| H A D | uvd_5_0_sh_mask.h | 359 #define UVD_MASTINT_EN__VCPU_EN_MASK 0x2 macro
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| H A D | uvd_6_0_sh_mask.h | 361 #define UVD_MASTINT_EN__VCPU_EN_MASK 0x2 macro
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| /linux/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| H A D | vcn_1_0_sh_mask.h | 1009 #define UVD_MASTINT_EN__VCPU_EN_MASK … macro
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| H A D | vcn_2_5_sh_mask.h | 2342 #define UVD_MASTINT_EN__VCPU_EN_MASK … macro
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| H A D | vcn_2_0_0_sh_mask.h | 2089 #define UVD_MASTINT_EN__VCPU_EN_MASK … macro
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| H A D | vcn_2_6_0_sh_mask.h | 4152 #define UVD_MASTINT_EN__VCPU_EN_MASK … macro
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| H A D | vcn_3_0_0_sh_mask.h | 3265 #define UVD_MASTINT_EN__VCPU_EN_MASK … macro
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| H A D | vcn_5_0_0_sh_mask.h | 2734 #define UVD_MASTINT_EN__VCPU_EN_MASK … macro
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| H A D | vcn_4_0_5_sh_mask.h | 3145 #define UVD_MASTINT_EN__VCPU_EN_MASK … macro
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| H A D | vcn_4_0_0_sh_mask.h | 3189 #define UVD_MASTINT_EN__VCPU_EN_MASK … macro
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| H A D | vcn_4_0_3_sh_mask.h | 3201 #define UVD_MASTINT_EN__VCPU_EN_MASK … macro
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