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Searched refs:UVD_LMI_STATUS__WRITE_CLEAN_MASK (Results 1 – 23 of 23) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_3_1_sh_mask.h379 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK 0x2 macro
H A Duvd_4_2_sh_mask.h383 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK 0x2 macro
H A Duvd_4_0_sh_mask.h380 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK 0x00000002L macro
H A Duvd_5_0_sh_mask.h415 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK 0x2 macro
H A Duvd_6_0_sh_mask.h417 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK 0x2 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1063 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK macro
H A Dvcn_2_5_sh_mask.h3400 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK macro
H A Dvcn_2_0_0_sh_mask.h2449 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK macro
H A Dvcn_2_6_0_sh_mask.h995 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK macro
H A Dvcn_3_0_0_sh_mask.h4722 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK macro
H A Dvcn_5_0_0_sh_mask.h4284 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK macro
H A Dvcn_4_0_5_sh_mask.h4712 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK macro
H A Dvcn_4_0_0_sh_mask.h4871 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK macro
H A Dvcn_4_0_3_sh_mask.h4914 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v5_0_1.c826 UVD_LMI_STATUS__WRITE_CLEAN_MASK |
H A Dvcn_v5_0_0.c1016 UVD_LMI_STATUS__WRITE_CLEAN_MASK | in vcn_v5_0_0_stop()
H A Dvcn_v4_0_5.c1273 UVD_LMI_STATUS__WRITE_CLEAN_MASK | in vcn_v4_0_5_stop()
H A Dvcn_v4_0_3.c1394 UVD_LMI_STATUS__WRITE_CLEAN_MASK | in vcn_v4_0_3_stop()
H A Dvcn_v1_0.c1184 UVD_LMI_STATUS__WRITE_CLEAN_MASK | in vcn_v1_0_stop_spg_mode()
H A Dvcn_v2_0.c1208 UVD_LMI_STATUS__WRITE_CLEAN_MASK | in vcn_v2_0_stop()
H A Dvcn_v2_5.c1596 UVD_LMI_STATUS__WRITE_CLEAN_MASK | in vcn_v2_5_dec_ring_get_wptr()
H A Dvcn_v4_0.c1620 UVD_LMI_STATUS__WRITE_CLEAN_MASK | in vcn_v4_0_stop()
H A Dvcn_v3_0.c1629 UVD_LMI_STATUS__WRITE_CLEAN_MASK | in vcn_v3_0_stop()