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Searched refs:UVD_LMI_STATUS__UMC_WRITE_CLEAN__SHIFT (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_3_1_sh_mask.h388 #define UVD_LMI_STATUS__UMC_WRITE_CLEAN__SHIFT 0x5 macro
H A Duvd_4_2_sh_mask.h392 #define UVD_LMI_STATUS__UMC_WRITE_CLEAN__SHIFT 0x5 macro
H A Duvd_4_0_sh_mask.h377 #define UVD_LMI_STATUS__UMC_WRITE_CLEAN__SHIFT 0x00000005 macro
H A Duvd_5_0_sh_mask.h424 #define UVD_LMI_STATUS__UMC_WRITE_CLEAN__SHIFT 0x5 macro
H A Duvd_6_0_sh_mask.h426 #define UVD_LMI_STATUS__UMC_WRITE_CLEAN__SHIFT 0x5 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_sh_mask.h3385 #define UVD_LMI_STATUS__UMC_WRITE_CLEAN__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h2434 #define UVD_LMI_STATUS__UMC_WRITE_CLEAN__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h980 #define UVD_LMI_STATUS__UMC_WRITE_CLEAN__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h4703 #define UVD_LMI_STATUS__UMC_WRITE_CLEAN__SHIFT … macro
H A Dvcn_5_0_0_sh_mask.h4269 #define UVD_LMI_STATUS__UMC_WRITE_CLEAN__SHIFT … macro
H A Dvcn_4_0_5_sh_mask.h4697 #define UVD_LMI_STATUS__UMC_WRITE_CLEAN__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h4856 #define UVD_LMI_STATUS__UMC_WRITE_CLEAN__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h4899 #define UVD_LMI_STATUS__UMC_WRITE_CLEAN__SHIFT … macro