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Searched refs:UVD_LMI_STATUS__UMC_AVP_IDLE_MASK (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_3_1_sh_mask.h399 #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK 0x800 macro
H A Duvd_4_2_sh_mask.h403 #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK 0x800 macro
H A Duvd_4_0_sh_mask.h366 #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK 0x00000800L macro
H A Duvd_5_0_sh_mask.h435 #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK 0x800 macro
H A Duvd_6_0_sh_mask.h437 #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK 0x800 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_sh_mask.h3410 #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK … macro
H A Dvcn_2_0_0_sh_mask.h2459 #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK … macro
H A Dvcn_2_6_0_sh_mask.h1005 #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK … macro
H A Dvcn_3_0_0_sh_mask.h4732 #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK … macro
H A Dvcn_5_0_0_sh_mask.h4294 #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK … macro
H A Dvcn_4_0_5_sh_mask.h4722 #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK … macro
H A Dvcn_4_0_0_sh_mask.h4881 #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK … macro
H A Dvcn_4_0_3_sh_mask.h4924 #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK … macro