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Searched refs:UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h505 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT … macro
H A Duvd_3_1_sh_mask.h346 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT 0x0 macro
H A Duvd_4_2_sh_mask.h350 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT 0x0 macro
H A Duvd_4_0_sh_mask.h349 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT 0x00000000 macro
H A Duvd_5_0_sh_mask.h382 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT 0x0 macro
H A Duvd_6_0_sh_mask.h384 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT 0x0 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1027 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT … macro
H A Dvcn_2_5_sh_mask.h3347 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h2396 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h936 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h4659 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT … macro
H A Dvcn_5_0_0_sh_mask.h4227 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT … macro
H A Dvcn_4_0_5_sh_mask.h4655 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h4812 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h4855 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Duvd_v7_0.c891 (uint32_t)((0x40 << UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT) | in uvd_v7_0_sriov_start()
1006 (0x40 << UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT) | in uvd_v7_0_start()