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Searched refs:UVD_LMI_CTRL__WRITE_CLEAN_TIMER_MASK (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h519 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_MASK … macro
H A Duvd_3_1_sh_mask.h345 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_MASK 0xff macro
H A Duvd_4_2_sh_mask.h349 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_MASK 0xff macro
H A Duvd_4_0_sh_mask.h348 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_MASK 0x000000ffL macro
H A Duvd_5_0_sh_mask.h381 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_MASK 0xff macro
H A Duvd_6_0_sh_mask.h383 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_MASK 0xff macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1041 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_MASK … macro
H A Dvcn_2_5_sh_mask.h3363 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_MASK … macro
H A Dvcn_2_0_0_sh_mask.h2412 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_MASK … macro
H A Dvcn_2_6_0_sh_mask.h955 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_MASK … macro
H A Dvcn_3_0_0_sh_mask.h4678 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_MASK … macro
H A Dvcn_5_0_0_sh_mask.h4245 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_MASK … macro
H A Dvcn_4_0_5_sh_mask.h4673 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_MASK … macro
H A Dvcn_4_0_0_sh_mask.h4831 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_MASK … macro
H A Dvcn_4_0_3_sh_mask.h4874 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_MASK … macro