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Searched refs:UVD_LMI_CTRL__CRC_RESET_MASK (Results 1 – 20 of 20) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h525 #define UVD_LMI_CTRL__CRC_RESET_MASK … macro
H A Duvd_3_1_sh_mask.h357 #define UVD_LMI_CTRL__CRC_RESET_MASK 0x4000 macro
H A Duvd_4_2_sh_mask.h361 #define UVD_LMI_CTRL__CRC_RESET_MASK 0x4000 macro
H A Duvd_4_0_sh_mask.h322 #define UVD_LMI_CTRL__CRC_RESET_MASK 0x00004000L macro
H A Duvd_5_0_sh_mask.h393 #define UVD_LMI_CTRL__CRC_RESET_MASK 0x4000 macro
H A Duvd_6_0_sh_mask.h395 #define UVD_LMI_CTRL__CRC_RESET_MASK 0x4000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1047 #define UVD_LMI_CTRL__CRC_RESET_MASK … macro
H A Dvcn_2_5_sh_mask.h3369 #define UVD_LMI_CTRL__CRC_RESET_MASK … macro
H A Dvcn_2_0_0_sh_mask.h2418 #define UVD_LMI_CTRL__CRC_RESET_MASK … macro
H A Dvcn_2_6_0_sh_mask.h961 #define UVD_LMI_CTRL__CRC_RESET_MASK … macro
H A Dvcn_3_0_0_sh_mask.h4684 #define UVD_LMI_CTRL__CRC_RESET_MASK … macro
H A Dvcn_5_0_0_sh_mask.h4251 #define UVD_LMI_CTRL__CRC_RESET_MASK … macro
H A Dvcn_4_0_5_sh_mask.h4679 #define UVD_LMI_CTRL__CRC_RESET_MASK … macro
H A Dvcn_4_0_0_sh_mask.h4837 #define UVD_LMI_CTRL__CRC_RESET_MASK … macro
H A Dvcn_4_0_3_sh_mask.h4880 #define UVD_LMI_CTRL__CRC_RESET_MASK … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v1_0.c1040 UVD_LMI_CTRL__CRC_RESET_MASK | in vcn_v1_0_start_dpg_mode()
1095 UVD_LMI_CTRL__CRC_RESET_MASK | in vcn_v1_0_start_dpg_mode()
H A Dvcn_v4_0_5.c906 UVD_LMI_CTRL__CRC_RESET_MASK | in vcn_v4_0_5_start_dpg_mode()
H A Dvcn_v2_0.c871 UVD_LMI_CTRL__CRC_RESET_MASK | in vcn_v2_0_start_dpg_mode()
H A Dvcn_v2_5.c900 UVD_LMI_CTRL__CRC_RESET_MASK | in vcn_v2_5_start_dpg_mode()
H A Dvcn_v3_0.c1020 UVD_LMI_CTRL__CRC_RESET_MASK | in vcn_v3_0_start_dpg_mode()