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Searched refs:UVD_GPCOM_VCPU_CMD__CMD_SOURCE__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h115 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE__SHIFT … macro
H A Duvd_3_1_sh_mask.h46 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE__SHIFT 0x1f macro
H A Duvd_4_2_sh_mask.h46 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE__SHIFT 0x1f macro
H A Duvd_4_0_sh_mask.h253 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE__SHIFT 0x0000001f macro
H A Duvd_5_0_sh_mask.h46 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE__SHIFT 0x1f macro
H A Duvd_6_0_sh_mask.h46 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE__SHIFT 0x1f macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h305 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE__SHIFT … macro
H A Dvcn_2_5_sh_mask.h2194 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h3165 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h3865 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h2960 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE__SHIFT … macro
H A Dvcn_5_0_0_sh_mask.h3528 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE__SHIFT … macro
H A Dvcn_4_0_5_sh_mask.h3838 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h3972 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h4007 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE__SHIFT … macro