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Searched refs:UVD_CGC_UDEC_STATUS__DB_DCLK_MASK (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_3_1_sh_mask.h287 #define UVD_CGC_UDEC_STATUS__DB_DCLK_MASK 0x400 macro
H A Duvd_4_2_sh_mask.h287 #define UVD_CGC_UDEC_STATUS__DB_DCLK_MASK 0x400 macro
H A Duvd_4_0_sh_mask.h214 #define UVD_CGC_UDEC_STATUS__DB_DCLK_MASK 0x00000400L macro
H A Duvd_5_0_sh_mask.h311 #define UVD_CGC_UDEC_STATUS__DB_DCLK_MASK 0x400 macro
H A Duvd_6_0_sh_mask.h313 #define UVD_CGC_UDEC_STATUS__DB_DCLK_MASK 0x400 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_sh_mask.h2051 #define UVD_CGC_UDEC_STATUS__DB_DCLK_MASK … macro
H A Dvcn_2_0_0_sh_mask.h2003 #define UVD_CGC_UDEC_STATUS__DB_DCLK_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3722 #define UVD_CGC_UDEC_STATUS__DB_DCLK_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2781 #define UVD_CGC_UDEC_STATUS__DB_DCLK_MASK … macro
H A Dvcn_5_0_0_sh_mask.h3455 #define UVD_CGC_UDEC_STATUS__DB_DCLK_MASK … macro
H A Dvcn_4_0_5_sh_mask.h3765 #define UVD_CGC_UDEC_STATUS__DB_DCLK_MASK … macro
H A Dvcn_4_0_0_sh_mask.h3899 #define UVD_CGC_UDEC_STATUS__DB_DCLK_MASK … macro
H A Dvcn_4_0_3_sh_mask.h3934 #define UVD_CGC_UDEC_STATUS__DB_DCLK_MASK … macro