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Searched refs:UVD_CGC_STATUS__MPC_SCLK__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_3_1_sh_mask.h202 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT 0x13 macro
H A Duvd_4_2_sh_mask.h202 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT 0x13 macro
H A Duvd_4_0_sh_mask.h167 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT 0x00000013 macro
H A Duvd_5_0_sh_mask.h218 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT 0x13 macro
H A Duvd_6_0_sh_mask.h220 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT 0x13 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h865 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT … macro
H A Dvcn_2_5_sh_mask.h1935 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h1885 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h3606 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h2665 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT … macro
H A Dvcn_5_0_0_sh_mask.h3384 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT … macro
H A Dvcn_4_0_5_sh_mask.h3694 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h3828 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h3863 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT … macro