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Searched refs:UVD_CGC_MEM_CTRL__UDEC_DB_LS_EN_MASK (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_3_1_sh_mask.h693 #define UVD_CGC_MEM_CTRL__UDEC_DB_LS_EN_MASK 0x80 macro
H A Duvd_4_2_sh_mask.h699 #define UVD_CGC_MEM_CTRL__UDEC_DB_LS_EN_MASK 0x80 macro
H A Duvd_4_0_sh_mask.h138 #define UVD_CGC_MEM_CTRL__UDEC_DB_LS_EN_MASK 0x00000080L macro
H A Duvd_5_0_sh_mask.h869 #define UVD_CGC_MEM_CTRL__UDEC_DB_LS_EN_MASK 0x80 macro
H A Duvd_6_0_sh_mask.h859 #define UVD_CGC_MEM_CTRL__UDEC_DB_LS_EN_MASK 0x80 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_3_0_0_sh_mask.h4856 #define UVD_CGC_MEM_CTRL__UDEC_DB_LS_EN_MASK … macro
H A Dvcn_5_0_0_sh_mask.h6904 #define UVD_CGC_MEM_CTRL__UDEC_DB_LS_EN_MASK … macro
H A Dvcn_4_0_5_sh_mask.h7738 #define UVD_CGC_MEM_CTRL__UDEC_DB_LS_EN_MASK … macro
H A Dvcn_4_0_0_sh_mask.h7410 #define UVD_CGC_MEM_CTRL__UDEC_DB_LS_EN_MASK … macro
H A Dvcn_4_0_3_sh_mask.h10201 #define UVD_CGC_MEM_CTRL__UDEC_DB_LS_EN_MASK … macro