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Searched refs:UVD_CGC_GATE__VCPU__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h395 #define UVD_CGC_GATE__VCPU__SHIFT macro
H A Duvd_3_1_sh_mask.h160 #define UVD_CGC_GATE__VCPU__SHIFT 0x12 macro
H A Duvd_4_2_sh_mask.h160 #define UVD_CGC_GATE__VCPU__SHIFT 0x12 macro
H A Duvd_4_0_sh_mask.h115 #define UVD_CGC_GATE__VCPU__SHIFT 0x00000012 macro
H A Duvd_5_0_sh_mask.h172 #define UVD_CGC_GATE__VCPU__SHIFT 0x12 macro
H A Duvd_6_0_sh_mask.h174 #define UVD_CGC_GATE__VCPU__SHIFT 0x12 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h823 #define UVD_CGC_GATE__VCPU__SHIFT macro
H A Dvcn_2_5_sh_mask.h1893 #define UVD_CGC_GATE__VCPU__SHIFT macro
H A Dvcn_2_0_0_sh_mask.h1841 #define UVD_CGC_GATE__VCPU__SHIFT macro
H A Dvcn_2_6_0_sh_mask.h3564 #define UVD_CGC_GATE__VCPU__SHIFT macro
H A Dvcn_3_0_0_sh_mask.h2623 #define UVD_CGC_GATE__VCPU__SHIFT macro
H A Dvcn_5_0_0_sh_mask.h52 #define UVD_CGC_GATE__VCPU__SHIFT macro
H A Dvcn_4_0_5_sh_mask.h48 #define UVD_CGC_GATE__VCPU__SHIFT macro
H A Dvcn_4_0_0_sh_mask.h52 #define UVD_CGC_GATE__VCPU__SHIFT macro
H A Dvcn_4_0_3_sh_mask.h52 #define UVD_CGC_GATE__VCPU__SHIFT macro