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Searched refs:UVD_CGC_GATE__UDEC_MASK (Results 1 – 20 of 20) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h398 #define UVD_CGC_GATE__UDEC_MASK … macro
H A Duvd_3_1_sh_mask.h125 #define UVD_CGC_GATE__UDEC_MASK 0x2 macro
H A Duvd_4_2_sh_mask.h125 #define UVD_CGC_GATE__UDEC_MASK 0x2 macro
H A Duvd_4_0_sh_mask.h108 #define UVD_CGC_GATE__UDEC_MASK 0x00000002L macro
H A Duvd_5_0_sh_mask.h137 #define UVD_CGC_GATE__UDEC_MASK 0x2 macro
H A Duvd_6_0_sh_mask.h139 #define UVD_CGC_GATE__UDEC_MASK 0x2 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h826 #define UVD_CGC_GATE__UDEC_MASK … macro
H A Dvcn_2_5_sh_mask.h1896 #define UVD_CGC_GATE__UDEC_MASK … macro
H A Dvcn_2_0_0_sh_mask.h1845 #define UVD_CGC_GATE__UDEC_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3567 #define UVD_CGC_GATE__UDEC_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2626 #define UVD_CGC_GATE__UDEC_MASK … macro
H A Dvcn_5_0_0_sh_mask.h61 #define UVD_CGC_GATE__UDEC_MASK … macro
H A Dvcn_4_0_5_sh_mask.h57 #define UVD_CGC_GATE__UDEC_MASK … macro
H A Dvcn_4_0_0_sh_mask.h61 #define UVD_CGC_GATE__UDEC_MASK … macro
H A Dvcn_4_0_3_sh_mask.h61 #define UVD_CGC_GATE__UDEC_MASK … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_5.c659 | UVD_CGC_GATE__UDEC_MASK in vcn_v4_0_5_disable_clock_gating()
H A Dvcn_v2_0.c551 | UVD_CGC_GATE__UDEC_MASK in vcn_v2_0_disable_clock_gating()
H A Dvcn_v1_0.c524 | UVD_CGC_GATE__UDEC_MASK in vcn_v1_0_disable_clock_gating()
H A Dvcn_v2_5.c638 | UVD_CGC_GATE__UDEC_MASK in vcn_v2_5_disable_clock_gating()
H A Dvcn_v3_0.c757 | UVD_CGC_GATE__UDEC_MASK in vcn_v3_0_disable_clock_gating()