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Searched refs:UVD_CGC_GATE__SYS_MASK (Results 1 – 20 of 20) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h397 #define UVD_CGC_GATE__SYS_MASK … macro
H A Duvd_3_1_sh_mask.h123 #define UVD_CGC_GATE__SYS_MASK 0x1 macro
H A Duvd_4_2_sh_mask.h123 #define UVD_CGC_GATE__SYS_MASK 0x1 macro
H A Duvd_4_0_sh_mask.h100 #define UVD_CGC_GATE__SYS_MASK 0x00000001L macro
H A Duvd_5_0_sh_mask.h135 #define UVD_CGC_GATE__SYS_MASK 0x1 macro
H A Duvd_6_0_sh_mask.h137 #define UVD_CGC_GATE__SYS_MASK 0x1 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h825 #define UVD_CGC_GATE__SYS_MASK … macro
H A Dvcn_2_5_sh_mask.h1895 #define UVD_CGC_GATE__SYS_MASK … macro
H A Dvcn_2_0_0_sh_mask.h1844 #define UVD_CGC_GATE__SYS_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3566 #define UVD_CGC_GATE__SYS_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2625 #define UVD_CGC_GATE__SYS_MASK … macro
H A Dvcn_5_0_0_sh_mask.h60 #define UVD_CGC_GATE__SYS_MASK … macro
H A Dvcn_4_0_5_sh_mask.h56 #define UVD_CGC_GATE__SYS_MASK … macro
H A Dvcn_4_0_0_sh_mask.h60 #define UVD_CGC_GATE__SYS_MASK … macro
H A Dvcn_4_0_3_sh_mask.h60 #define UVD_CGC_GATE__SYS_MASK … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_5.c658 data &= ~(UVD_CGC_GATE__SYS_MASK in vcn_v4_0_5_disable_clock_gating()
H A Dvcn_v2_0.c550 data &= ~(UVD_CGC_GATE__SYS_MASK in vcn_v2_0_disable_clock_gating()
H A Dvcn_v1_0.c523 data &= ~(UVD_CGC_GATE__SYS_MASK in vcn_v1_0_disable_clock_gating()
H A Dvcn_v2_5.c637 data &= ~(UVD_CGC_GATE__SYS_MASK in vcn_v2_5_disable_clock_gating()
H A Dvcn_v3_0.c756 data &= ~(UVD_CGC_GATE__SYS_MASK in vcn_v3_0_disable_clock_gating()