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Searched refs:UVD_CGC_GATE__LMI_UMC_MASK (Results 1 – 23 of 23) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h403 #define UVD_CGC_GATE__LMI_UMC_MASK … macro
H A Duvd_3_1_sh_mask.h135 #define UVD_CGC_GATE__LMI_UMC_MASK 0x40 macro
H A Duvd_4_2_sh_mask.h135 #define UVD_CGC_GATE__LMI_UMC_MASK 0x40 macro
H A Duvd_4_0_sh_mask.h84 #define UVD_CGC_GATE__LMI_UMC_MASK 0x00000040L macro
H A Duvd_5_0_sh_mask.h147 #define UVD_CGC_GATE__LMI_UMC_MASK 0x40 macro
H A Duvd_6_0_sh_mask.h149 #define UVD_CGC_GATE__LMI_UMC_MASK 0x40 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Duvd_v6_0.c685 UVD_CGC_GATE__LMI_UMC_MASK |
1309 UVD_CGC_GATE__LMI_UMC_MASK | in uvd_v6_0_enable_clock_gating()
H A Dvcn_v4_0_5.c666 | UVD_CGC_GATE__LMI_UMC_MASK in vcn_v4_0_5_disable_clock_gating()
H A Dvcn_v4_0_3.c588 | UVD_CGC_GATE__LMI_UMC_MASK in vcn_v4_0_3_disable_clock_gating()
H A Dvcn_v2_0.c558 | UVD_CGC_GATE__LMI_UMC_MASK in vcn_v2_0_disable_clock_gating()
H A Dvcn_v4_0.c730 | UVD_CGC_GATE__LMI_UMC_MASK in vcn_v4_0_disable_clock_gating()
H A Dvcn_v1_0.c530 | UVD_CGC_GATE__LMI_UMC_MASK in vcn_v1_0_disable_clock_gating()
H A Dvcn_v2_5.c645 | UVD_CGC_GATE__LMI_UMC_MASK in vcn_v2_5_disable_clock_gating()
H A Dvcn_v3_0.c764 | UVD_CGC_GATE__LMI_UMC_MASK in vcn_v3_0_disable_clock_gating()
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h831 #define UVD_CGC_GATE__LMI_UMC_MASK … macro
H A Dvcn_2_5_sh_mask.h1901 #define UVD_CGC_GATE__LMI_UMC_MASK … macro
H A Dvcn_2_0_0_sh_mask.h1850 #define UVD_CGC_GATE__LMI_UMC_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3572 #define UVD_CGC_GATE__LMI_UMC_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2631 #define UVD_CGC_GATE__LMI_UMC_MASK … macro
H A Dvcn_5_0_0_sh_mask.h66 #define UVD_CGC_GATE__LMI_UMC_MASK … macro
H A Dvcn_4_0_5_sh_mask.h62 #define UVD_CGC_GATE__LMI_UMC_MASK … macro
H A Dvcn_4_0_0_sh_mask.h66 #define UVD_CGC_GATE__LMI_UMC_MASK … macro
H A Dvcn_4_0_3_sh_mask.h66 #define UVD_CGC_GATE__LMI_UMC_MASK … macro