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Searched refs:UVD_CGC_CTRL__LMI_UMC_MODE_MASK (Results 1 – 25 of 25) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h455 #define UVD_CGC_CTRL__LMI_UMC_MODE_MASK macro
H A Duvd_3_1_sh_mask.h249 #define UVD_CGC_CTRL__LMI_UMC_MODE_MASK 0x400000 macro
H A Duvd_4_2_sh_mask.h249 #define UVD_CGC_CTRL__LMI_UMC_MODE_MASK 0x400000 macro
H A Duvd_4_0_sh_mask.h44 #define UVD_CGC_CTRL__LMI_UMC_MODE_MASK 0x00400000L macro
H A Duvd_5_0_sh_mask.h271 #define UVD_CGC_CTRL__LMI_UMC_MODE_MASK 0x400000 macro
H A Duvd_6_0_sh_mask.h273 #define UVD_CGC_CTRL__LMI_UMC_MODE_MASK 0x400000 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_5.c696 | UVD_CGC_CTRL__LMI_UMC_MODE_MASK in vcn_v4_0_5_disable_clock_gating()
781 UVD_CGC_CTRL__LMI_UMC_MODE_MASK | in vcn_v4_0_5_disable_clock_gating_dpg_mode()
839 | UVD_CGC_CTRL__LMI_UMC_MODE_MASK in vcn_v4_0_5_enable_clock_gating()
H A Dvcn_v4_0_3.c605 | UVD_CGC_CTRL__LMI_UMC_MODE_MASK in vcn_v4_0_3_disable_clock_gating()
677 UVD_CGC_CTRL__LMI_UMC_MODE_MASK | in vcn_v4_0_3_disable_clock_gating_dpg_mode()
732 | UVD_CGC_CTRL__LMI_UMC_MODE_MASK in vcn_v4_0_3_enable_clock_gating()
H A Dvcn_v2_0.c586 | UVD_CGC_CTRL__LMI_UMC_MODE_MASK in vcn_v2_0_disable_clock_gating()
662 UVD_CGC_CTRL__LMI_UMC_MODE_MASK | in vcn_v2_0_clock_gating_dpg_mode()
723 | UVD_CGC_CTRL__LMI_UMC_MODE_MASK in vcn_v2_0_enable_clock_gating()
H A Dvcn_v4_0.c760 | UVD_CGC_CTRL__LMI_UMC_MODE_MASK in vcn_v4_0_disable_clock_gating()
845 UVD_CGC_CTRL__LMI_UMC_MODE_MASK | in vcn_v4_0_disable_clock_gating_dpg_mode()
903 | UVD_CGC_CTRL__LMI_UMC_MODE_MASK in vcn_v4_0_enable_clock_gating()
H A Dvcn_v1_0.c558 | UVD_CGC_CTRL__LMI_UMC_MODE_MASK in vcn_v1_0_disable_clock_gating()
658 | UVD_CGC_CTRL__LMI_UMC_MODE_MASK in vcn_v1_0_enable_clock_gating()
716 UVD_CGC_CTRL__LMI_UMC_MODE_MASK | in vcn_v1_0_clock_gating_dpg_mode()
H A Duvd_v5_0.c707 UVD_CGC_CTRL__LMI_UMC_MODE_MASK | in uvd_v5_0_set_sw_clock_gating()
H A Dvcn_v2_5.c676 | UVD_CGC_CTRL__LMI_UMC_MODE_MASK in vcn_v2_5_disable_clock_gating()
753 UVD_CGC_CTRL__LMI_UMC_MODE_MASK | in vcn_v2_5_clock_gating_dpg_mode()
815 | UVD_CGC_CTRL__LMI_UMC_MODE_MASK in vcn_v2_5_enable_clock_gating()
H A Dvcn_v3_0.c795 | UVD_CGC_CTRL__LMI_UMC_MODE_MASK in vcn_v3_0_disable_clock_gating()
894 UVD_CGC_CTRL__LMI_UMC_MODE_MASK | in vcn_v3_0_clock_gating_dpg_mode()
953 | UVD_CGC_CTRL__LMI_UMC_MODE_MASK in vcn_v3_0_enable_clock_gating()
H A Duvd_v6_0.c1364 UVD_CGC_CTRL__LMI_UMC_MODE_MASK | in uvd_v6_0_set_sw_clock_gating()
H A Duvd_v7_0.c1646 UVD_CGC_CTRL__LMI_UMC_MODE_MASK |
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h948 #define UVD_CGC_CTRL__LMI_UMC_MODE_MASK macro
H A Dvcn_2_5_sh_mask.h2016 #define UVD_CGC_CTRL__LMI_UMC_MODE_MASK macro
H A Dvcn_2_0_0_sh_mask.h1967 #define UVD_CGC_CTRL__LMI_UMC_MODE_MASK macro
H A Dvcn_2_6_0_sh_mask.h3687 #define UVD_CGC_CTRL__LMI_UMC_MODE_MASK macro
H A Dvcn_3_0_0_sh_mask.h2746 #define UVD_CGC_CTRL__LMI_UMC_MODE_MASK macro
H A Dvcn_5_0_0_sh_mask.h124 #define UVD_CGC_CTRL__LMI_UMC_MODE_MASK macro
H A Dvcn_4_0_5_sh_mask.h120 #define UVD_CGC_CTRL__LMI_UMC_MODE_MASK macro
H A Dvcn_4_0_0_sh_mask.h124 #define UVD_CGC_CTRL__LMI_UMC_MODE_MASK macro
H A Dvcn_4_0_3_sh_mask.h124 #define UVD_CGC_CTRL__LMI_UMC_MODE_MASK macro