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Searched refs:USRRetrainingLatencyMargin (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_shared_types.h1258 double USRRetrainingLatencyMargin[DML2_MAX_PLANES];
1257 double USRRetrainingLatencyMargin[DML2_MAX_PLANES]; global() member
H A Ddml2_core_dcn4_calcs.c6886 s->USRRetrainingLatencyMargin[k] = s->ActiveClockChangeLatencyHiding - p->Watermark->USRRetrainingWatermark; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddisplay_mode_core_structs.h1753 dml_float_t USRRetrainingLatencyMargin[__DML_NUM_PLANES__]; member
H A Ddisplay_mode_core.c2985 s->USRRetrainingLatencyMargin[k] = s->ActiveClockChangeLatencyHiding - p->Watermark->USRRetrainingWatermark; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3005 if ((p->UseMALLForPStateChange[k] != dml_use_mall_pstate_change_phantom_pipe) && (s->USRRetrainingLatencyMargin[k] < 0)) { in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()