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Searched refs:UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_sh_mask.h2775 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK 0x2000 macro
H A Ddce_10_0_sh_mask.h2791 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK 0x2000 macro
H A Ddce_11_2_sh_mask.h3015 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK 0x2000 macro
H A Ddce_12_0_sh_mask.h9120 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h39868 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK … macro
H A Ddcn_3_0_1_sh_mask.h35877 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK … macro
H A Ddcn_3_2_1_sh_mask.h39837 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK … macro
H A Ddcn_2_1_0_sh_mask.h43163 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK … macro
H A Ddcn_3_1_2_sh_mask.h44563 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK … macro
H A Ddcn_3_1_5_sh_mask.h42664 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK … macro
H A Ddcn_3_1_6_sh_mask.h45621 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK … macro
H A Ddcn_3_0_2_sh_mask.h42489 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK … macro
H A Ddcn_2_0_0_sh_mask.h48642 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK … macro
H A Ddcn_3_0_0_sh_mask.h49074 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_4_2_0_sh_mask.h3579 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK … macro
H A Ddpcs_4_2_2_sh_mask.h3700 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK … macro
H A Ddpcs_4_2_3_sh_mask.h3730 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK … macro