| /linux/arch/powerpc/platforms/powernv/ |
| H A D | vas-window.c | 220 write_hvwc_reg(window, VREG(LPID), 0ULL); in reset_window_regs()
221 write_hvwc_reg(window, VREG(PID), 0ULL); in reset_window_regs()
222 write_hvwc_reg(window, VREG(XLATE_MSR), 0ULL); in reset_window_regs()
223 write_hvwc_reg(window, VREG(XLATE_LPCR), 0ULL); in reset_window_regs()
224 write_hvwc_reg(window, VREG(XLATE_CTL), 0ULL); in reset_window_regs()
225 write_hvwc_reg(window, VREG(AMR), 0ULL); in reset_window_regs()
226 write_hvwc_reg(window, VREG(SEIDR), 0ULL); in reset_window_regs()
227 write_hvwc_reg(window, VREG(FAULT_TX_WIN), 0ULL); in reset_window_regs()
228 write_hvwc_reg(window, VREG(OSU_INTR_SRC_RA), 0ULL); in reset_window_regs()
229 write_hvwc_reg(window, VREG(HV_INTR_SRC_RA), 0ULL); in reset_window_regs()
[all …]
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| /linux/arch/parisc/include/asm/ |
| H A D | pdc_chassis.h | 58 #define PDC_CHASSIS_LED_RUN_OFF (0ULL << 4)
62 #define PDC_CHASSIS_LED_ATTN_OFF (0ULL << 6)
65 #define PDC_CHASSIS_LED_FAULT_OFF (0ULL << 8)
160 #define PDC_CHASSIS_ALERT_FORWARD (0ULL << 36) /* no failure detected */
175 #define PDC_CHASSIS_SRC_NONE (0ULL << 28) /* unknown, no source stated */
192 #define PDC_CHASSIS_SRC_ID_UNSPEC (0ULL << 16)
195 #define PDC_CHASSIS_PB_D_PROC_NONE (0ULL << 32) /* no problem detail */
210 #define PDC_CHASSIS_ACT_STATUS_UNSPEC (0ULL << 0)
214 #define PDC_CHASSIS_CALL_SACT_UNSPEC (0ULL << 4) /* implementation dependent */
223 #define PDC_CHASSIS_REID_UNSPEC (0ULL << 44)
[all …]
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| /linux/drivers/crypto/cavium/nitrox/ |
| H A D | nitrox_hal.c | 290 nitrox_write_csr(ndev, NPS_PKT_IN_RERR_LO_ENA_W1S, (~0ULL)); in enable_nps_pkt_interrupts()
291 nitrox_write_csr(ndev, NPS_PKT_IN_RERR_HI_ENA_W1S, (~0ULL)); in enable_nps_pkt_interrupts()
292 nitrox_write_csr(ndev, NPS_PKT_IN_ERR_TYPE_ENA_W1S, (~0ULL)); in enable_nps_pkt_interrupts()
294 nitrox_write_csr(ndev, NPS_PKT_SLC_RERR_HI_ENA_W1S, (~0ULL)); in enable_nps_pkt_interrupts()
295 nitrox_write_csr(ndev, NPS_PKT_SLC_RERR_LO_ENA_W1S, (~0ULL)); in enable_nps_pkt_interrupts()
376 nitrox_write_csr(ndev, offset, 0ULL); in nitrox_config_aqm_rings()
402 nitrox_write_csr(ndev, AQM_DBELL_OVF_LO_ENA_W1S, (~0ULL)); in enable_aqm_interrupts()
403 nitrox_write_csr(ndev, AQM_DBELL_OVF_HI_ENA_W1S, (~0ULL)); in enable_aqm_interrupts()
404 nitrox_write_csr(ndev, AQM_DMA_RD_ERR_LO_ENA_W1S, (~0ULL)); in enable_aqm_interrupts()
405 nitrox_write_csr(ndev, AQM_DMA_RD_ERR_HI_ENA_W1S, (~0ULL)); in enable_aqm_interrupts()
[all …]
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| /linux/arch/mips/include/asm/octeon/ |
| H A D | cvmx-address.h | 300 #define CVMX_OCT_DID_MIS 0ULL /* misc stuff */
324 #define CVMX_OCT_DID_TAG_SWTAG CVMX_FULL_DID(CVMX_OCT_DID_TAG, 0ULL)
330 #define CVMX_OCT_DID_FAU_FAI CVMX_FULL_DID(CVMX_OCT_DID_IOB, 0ULL)
331 #define CVMX_OCT_DID_TIM_CSR CVMX_FULL_DID(CVMX_OCT_DID_TIM, 0ULL)
332 #define CVMX_OCT_DID_KEY_RW CVMX_FULL_DID(CVMX_OCT_DID_KEY, 0ULL)
334 #define CVMX_OCT_DID_MIS_BOO CVMX_FULL_DID(CVMX_OCT_DID_MIS, 0ULL)
335 #define CVMX_OCT_DID_PCI_RML CVMX_FULL_DID(CVMX_OCT_DID_PCI, 0ULL)
339 #define CVMX_OCT_DID_ZIP_CSR CVMX_FULL_DID(CVMX_OCT_DID_ZIP, 0ULL)
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| /linux/drivers/net/ethernet/marvell/octeontx2/af/ |
| H A D | rvu_devlink.c | 75 rvu_write64(rvu, blkaddr, NIX_AF_RVU_INT_ENA_W1C, ~0ULL); in rvu_nix_af_rvu_intr_handler()
110 rvu_write64(rvu, blkaddr, NIX_AF_GEN_INT_ENA_W1C, ~0ULL); in rvu_nix_af_rvu_gen_handler()
145 rvu_write64(rvu, blkaddr, NIX_AF_ERR_INT_ENA_W1C, ~0ULL); in rvu_nix_af_rvu_err_handler()
180 rvu_write64(rvu, blkaddr, NIX_AF_RAS_ENA_W1C, ~0ULL); in rvu_nix_af_rvu_ras_handler()
199 rvu_write64(rvu, blkaddr, NIX_AF_RVU_INT_ENA_W1C, ~0ULL); in rvu_nix_unregister_interrupts()
200 rvu_write64(rvu, blkaddr, NIX_AF_GEN_INT_ENA_W1C, ~0ULL); in rvu_nix_unregister_interrupts()
201 rvu_write64(rvu, blkaddr, NIX_AF_ERR_INT_ENA_W1C, ~0ULL); in rvu_nix_unregister_interrupts()
202 rvu_write64(rvu, blkaddr, NIX_AF_RAS_ENA_W1C, ~0ULL); in rvu_nix_unregister_interrupts()
240 rvu_write64(rvu, blkaddr, NIX_AF_RVU_INT_ENA_W1S, ~0ULL); in rvu_nix_register_interrupts()
248 rvu_write64(rvu, blkaddr, NIX_AF_GEN_INT_ENA_W1S, ~0ULL); in rvu_nix_register_interrupts()
[all …]
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| /linux/tools/include/linux/ |
| H A D | bitfield.h | 85 __BF_FIELD_CHECK(_mask, 0ULL, 0ULL, "FIELD_MAX: "); \
98 __BF_FIELD_CHECK(_mask, 0ULL, 0ULL, "FIELD_FIT: "); \
112 __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
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| /linux/tools/perf/Documentation/ |
| H A D | perf-dlfilter.txt | 231 PERF_DLFILTER_FLAG_BRANCH = 1ULL << 0,
232 PERF_DLFILTER_FLAG_CALL = 1ULL << 1,
233 PERF_DLFILTER_FLAG_RETURN = 1ULL << 2,
234 PERF_DLFILTER_FLAG_CONDITIONAL = 1ULL << 3,
235 PERF_DLFILTER_FLAG_SYSCALLRET = 1ULL << 4,
236 PERF_DLFILTER_FLAG_ASYNC = 1ULL << 5,
237 PERF_DLFILTER_FLAG_INTERRUPT = 1ULL << 6,
238 PERF_DLFILTER_FLAG_TX_ABORT = 1ULL << 7,
239 PERF_DLFILTER_FLAG_TRACE_BEGIN = 1ULL << 8,
240 PERF_DLFILTER_FLAG_TRACE_END = 1ULL << 9,
[all …]
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| /linux/drivers/of/ |
| H A D | of_test.c | 127 .start = ULL(0x100000000),
130 .res_start = ULL(0x100000000),
131 .res_end = ULL(0x100000000),
138 .res_end = ULL(0x100000ffe),
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| /linux/drivers/md/bcache/ |
| H A D | bcache_ondisk.h | 13 { return (k->field >> offset) & ~(~0ULL << size); } \
17 k->field &= ~(~(~0ULL << size) << offset); \
18 k->field |= (v & ~(~0ULL << size)) << offset; \
34 { return (k->ptr[i] >> offset) & ~(~0ULL << size); } \
38 k->ptr[i] &= ~(~(~0ULL << size) << offset); \
39 k->ptr[i] |= (v & ~(~0ULL << size)) << offset; \
80 #define MAX_KEY_OFFSET (~0ULL >> 1)
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| /linux/include/vdso/ |
| H A D | limits.h | 14 #define LLONG_MAX ((long long)(~0ULL >> 1))
16 #define ULLONG_MAX (~0ULL)
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| /linux/drivers/block/drbd/ |
| H A D | drbd_vli.h | 141 *out = ((in & ((~0ULL) >> (64-t))) >> b) + adj; \ in vli_decode_bits()
261 val &= ~0ULL >> (64 - bits); in bitstream_put_bits()
312 val &= ~0ULL >> (64 - bits); in bitstream_get_bits()
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| /linux/arch/x86/include/asm/ |
| H A D | pgtable-3level.h | 105 return pxx_xchg64(pte, ptep, 0ULL); in native_ptep_get_and_clear()
110 return pxx_xchg64(pmd, pmdp, 0ULL); in native_pmdp_get_and_clear()
115 return pxx_xchg64(pud, pudp, 0ULL); in native_pudp_get_and_clear()
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| /linux/include/linux/ |
| H A D | rseq_entry.h | 327 unsafe_put_user(0ULL, &t->rseq.usrptr->rseq_cs, efault); in rseq_debug_update_user_cs()
332 unsafe_put_user(0ULL, &t->rseq.usrptr->rseq_cs, efault); in rseq_debug_update_user_cs()
334 abort_ip = 0ULL; in rseq_debug_update_user_cs()
449 unsafe_put_user(0ULL, &t->rseq.usrptr->rseq_cs, efault); in rseq_update_user_cs()
455 unsafe_put_user(0ULL, &t->rseq.usrptr->rseq_cs, efault); in rseq_update_user_cs()
457 abort_ip = 0ULL; in rseq_update_user_cs()
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| /linux/drivers/net/ethernet/cavium/thunder/ |
| H A D | nicvf_queues.h | 34 #define RBDR_SIZE0 0ULL /* 8K entries */
42 #define SND_QUEUE_SIZE0 0ULL /* 1K entries */
50 #define CMP_QUEUE_SIZE0 0ULL /* 1K entries */
114 #define RQ_DROP_RBDR_LVL 0ULL
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| /linux/fs/btrfs/ |
| H A D | fs.h | 74 #define BTRFS_OLDEST_GENERATION 0ULL
286 #define BTRFS_FEATURE_COMPAT_SUPP 0ULL
287 #define BTRFS_FEATURE_COMPAT_SAFE_SET 0ULL
288 #define BTRFS_FEATURE_COMPAT_SAFE_CLEAR 0ULL
296 #define BTRFS_FEATURE_COMPAT_RO_SAFE_SET 0ULL
297 #define BTRFS_FEATURE_COMPAT_RO_SAFE_CLEAR 0ULL
335 #define BTRFS_FEATURE_INCOMPAT_SAFE_CLEAR 0ULL
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| /linux/tools/testing/selftests/bpf/prog_tests/ |
| H A D | token.c | 77 if (mask == ~0ULL) { in set_delegate_mask()
1123 .attachs = ~0ULL, in test_token()
1132 .attachs = ~0ULL, in test_token()
1140 .attachs = ~0ULL, in test_token()
1150 .attachs = ~0ULL, in test_token()
1161 .attachs = ~0ULL, in test_token()
1172 .attachs = ~0ULL, in test_token()
1183 .attachs = ~0ULL, in test_token()
1192 .attachs = ~0ULL, in test_token()
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| /linux/drivers/net/ethernet/freescale/dpaa2/ |
| H A D | dpaa2-eth-dcb.c | 32 cfg.message_iova = 0ULL; in dpaa2_eth_set_pfc_cn()
33 cfg.message_ctx = 0ULL; in dpaa2_eth_set_pfc_cn()
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| /linux/drivers/gpu/drm/nouveau/ |
| H A D | nouveau_vmm.c | 66 if (likely(vma->addr != ~0ULL)) { in nouveau_vma_del()
94 vma->addr = ~0ULL; in nouveau_vma_new()
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| /linux/block/partitions/ |
| H A D | cmdline.c | 54 new_subpart->size = (sector_t)(~0ULL); in parse_subpart()
69 new_subpart->from = (sector_t)(~0ULL); in parse_subpart()
264 if (subpart->from == (sector_t)(~0ULL)) in cmdline_parts_set()
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| /linux/drivers/vhost/ |
| H A D | iotlb.c | 171 vhost_iotlb_del_range(iotlb, 0ULL, 0ULL - 1); in vhost_iotlb_reset()
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| /linux/arch/mips/sibyte/common/ |
| H A D | cfe.c | 25 #define MAX_RAM_SIZE (~0ULL)
29 #define MAX_RAM_SIZE (~0ULL)
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| /linux/arch/x86/kernel/cpu/resctrl/ |
| H A D | rdtgroup.c | 122 wrmsrq(MSR_IA32_L3_QOS_CFG, *enable ? L3_QOS_CDP_ENABLE : 0ULL); in l3_qos_cfg_update()
129 wrmsrq(MSR_IA32_L2_QOS_CFG, *enable ? L2_QOS_CDP_ENABLE : 0ULL); in l2_qos_cfg_update()
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| /linux/drivers/misc/genwqe/ |
| H A D | card_ddcb.c | 590 pu64[0] = 0ULL; /* offs 0x00 (ICRC,HSI,SHI,...) */ in get_next_ddcb()
591 pu64[1] = 0ULL; /* offs 0x01 (ACFUNC,CMD...) */ in get_next_ddcb()
594 pu64[0x80/8] = 0ULL; /* offs 0x80 (ASV + 0) */ in get_next_ddcb()
595 pu64[0x88/8] = 0ULL; /* offs 0x88 (ASV + 0x08) */ in get_next_ddcb()
596 pu64[0x90/8] = 0ULL; /* offs 0x90 (ASV + 0x10) */ in get_next_ddcb()
597 pu64[0x98/8] = 0ULL; /* offs 0x98 (ASV + 0x18) */ in get_next_ddcb()
598 pu64[0xd0/8] = 0ULL; /* offs 0xd0 (RETC,ATTN...) */ in get_next_ddcb()
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| /linux/tools/include/vdso/ |
| H A D | bits.h | 8 #define BIT_ULL(nr) (ULL(1) << (nr))
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| H A D | const.h | 8 #define ULL(x) (_ULL(x)) macro
|