Home
last modified time | relevance | path

Searched refs:UIC_ARG_MIB (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/ufs/host/
H A Dufshcd-dwc.c57 ufshcd_dme_get(hba, UIC_ARG_MIB(VS_POWERSTATE), &dme_result); in ufshcd_dwc_link_is_up()
83 { UIC_ARG_MIB(T_CONNECTIONSTATE), 0, DME_LOCAL }, in ufshcd_dwc_connection_setup()
84 { UIC_ARG_MIB(N_DEVICEID), 0, DME_LOCAL }, in ufshcd_dwc_connection_setup()
85 { UIC_ARG_MIB(N_DEVICEID_VALID), 0, DME_LOCAL }, in ufshcd_dwc_connection_setup()
86 { UIC_ARG_MIB(T_PEERDEVICEID), 1, DME_LOCAL }, in ufshcd_dwc_connection_setup()
87 { UIC_ARG_MIB(T_PEERCPORTID), 0, DME_LOCAL }, in ufshcd_dwc_connection_setup()
88 { UIC_ARG_MIB(T_TRAFFICCLASS), 0, DME_LOCAL }, in ufshcd_dwc_connection_setup()
89 { UIC_ARG_MIB(T_CPORTFLAGS), 0x6, DME_LOCAL }, in ufshcd_dwc_connection_setup()
90 { UIC_ARG_MIB(T_CPORTMODE), 1, DME_LOCAL }, in ufshcd_dwc_connection_setup()
91 { UIC_ARG_MIB(T_CONNECTIONSTATE), 1, DME_LOCAL }, in ufshcd_dwc_connection_setup()
[all …]
H A Dcdns-pltfrm.c41 ufshcd_dme_get(hba, UIC_ARG_MIB(T_PEERDEVICEID), in cdns_ufs_get_l4_attr()
43 ufshcd_dme_get(hba, UIC_ARG_MIB(T_PEERCPORTID), in cdns_ufs_get_l4_attr()
45 ufshcd_dme_get(hba, UIC_ARG_MIB(T_TRAFFICCLASS), in cdns_ufs_get_l4_attr()
47 ufshcd_dme_get(hba, UIC_ARG_MIB(T_PROTOCOLID), in cdns_ufs_get_l4_attr()
49 ufshcd_dme_get(hba, UIC_ARG_MIB(T_CPORTFLAGS), in cdns_ufs_get_l4_attr()
51 ufshcd_dme_get(hba, UIC_ARG_MIB(T_TXTOKENVALUE), in cdns_ufs_get_l4_attr()
53 ufshcd_dme_get(hba, UIC_ARG_MIB(T_RXTOKENVALUE), in cdns_ufs_get_l4_attr()
55 ufshcd_dme_get(hba, UIC_ARG_MIB(T_LOCALBUFFERSPACE), in cdns_ufs_get_l4_attr()
57 ufshcd_dme_get(hba, UIC_ARG_MIB(T_PEERBUFFERSPACE), in cdns_ufs_get_l4_attr()
59 ufshcd_dme_get(hba, UIC_ARG_MIB(T_CREDITSTOSEND), in cdns_ufs_get_l4_attr()
[all …]
H A Dtc-dwc-g210.c28 { UIC_ARG_MIB(TX_GLOBALHIBERNATE), 0x00, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
29 { UIC_ARG_MIB(REFCLKMODE), 0x01, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
30 { UIC_ARG_MIB(CDIRECTCTRL6), 0x80, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
31 { UIC_ARG_MIB(CBDIVFACTOR), 0x08, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
32 { UIC_ARG_MIB(CBDCOCTRL5), 0x64, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
33 { UIC_ARG_MIB(CBPRGTUNING), 0x09, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
34 { UIC_ARG_MIB(RTOBSERVESELECT), 0x00, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
51 { UIC_ARG_MIB(DIRECTCTRL10), 0x04, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
52 { UIC_ARG_MIB(DIRECTCTRL19), 0x02, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
75 { UIC_ARG_MIB(CBPRGPLL2), 0x00, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
[all …]
H A Dufs-hisi.c257 ufshcd_dme_set(hba, UIC_ARG_MIB(0x2044), 0x0); in ufs_hisi_link_startup_post_change()
259 ufshcd_dme_set(hba, UIC_ARG_MIB(0x2045), 0x0); in ufs_hisi_link_startup_post_change()
261 ufshcd_dme_set(hba, UIC_ARG_MIB(0x2040), 0x9); in ufs_hisi_link_startup_post_change()
270 ufshcd_dme_set(hba, UIC_ARG_MIB(0xd09a), 0x80000000); in ufs_hisi_link_startup_post_change()
272 ufshcd_dme_set(hba, UIC_ARG_MIB(0xd09c), 0x00000005); in ufs_hisi_link_startup_post_change()
311 ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0xD0A0), 0x13); in ufs_hisi_pwr_change_pre_change()
313 ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0x1552), 0x4f); in ufs_hisi_pwr_change_pre_change()
315 ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0x1554), 0x4f); in ufs_hisi_pwr_change_pre_change()
317 ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0x1556), 0x4f); in ufs_hisi_pwr_change_pre_change()
319 ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0x15a7), 0xA); in ufs_hisi_pwr_change_pre_change()
[all …]
H A Dufs-amd-versal2.c49 { UIC_ARG_MIB(CBCREGADDRLSB), 0, DME_LOCAL }, in ufs_versal2_phy_reg_write()
50 { UIC_ARG_MIB(CBCREGADDRMSB), 0, DME_LOCAL }, in ufs_versal2_phy_reg_write()
51 { UIC_ARG_MIB(CBCREGWRLSB), 0, DME_LOCAL }, in ufs_versal2_phy_reg_write()
52 { UIC_ARG_MIB(CBCREGWRMSB), 0, DME_LOCAL }, in ufs_versal2_phy_reg_write()
53 { UIC_ARG_MIB(CBCREGRDWRSEL), 1, DME_LOCAL }, in ufs_versal2_phy_reg_write()
54 { UIC_ARG_MIB(VS_MPHYCFGUPDT), 1, DME_LOCAL } in ufs_versal2_phy_reg_write()
70 { UIC_ARG_MIB(CBCREGADDRLSB), 0, DME_LOCAL }, in ufs_versal2_phy_reg_read()
71 { UIC_ARG_MIB(CBCREGADDRMSB), 0, DME_LOCAL }, in ufs_versal2_phy_reg_read()
72 { UIC_ARG_MIB(CBCREGRDWRSEL), 0, DME_LOCAL }, in ufs_versal2_phy_reg_read()
73 { UIC_ARG_MIB(VS_MPHYCFGUPDT), 1, DME_LOCAL } in ufs_versal2_phy_reg_read()
[all …]
H A Dufs-sprd.c47 if (ufshcd_dme_get(hba, UIC_ARG_MIB(PA_LOCALVERINFO), &host->unipro_ver)) in ufs_sprd_get_unipro_ver()
280 ufshcd_dme_set(hba, UIC_ARG_MIB(CBREFCLKCTRL2), 0x90); in ufs_sprd_n6_phy_init()
281 ufshcd_dme_set(hba, UIC_ARG_MIB(CBCRCTRL), 0x01); in ufs_sprd_n6_phy_init()
286 ufshcd_dme_set(hba, UIC_ARG_MIB(VS_MPHYCFGUPDT), 0x01); in ufs_sprd_n6_phy_init()
287 ufshcd_dme_set(hba, UIC_ARG_MIB(CBRATESEL), 0x01); in ufs_sprd_n6_phy_init()
295 ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGADDRLSB), 0x1c); in ufs_sprd_n6_phy_init()
296 ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGADDRMSB), offset); in ufs_sprd_n6_phy_init()
297 ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGWRLSB), 0x04); in ufs_sprd_n6_phy_init()
298 ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGWRMSB), 0x00); in ufs_sprd_n6_phy_init()
299 ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGRDWRSEL), 0x01); in ufs_sprd_n6_phy_init()
[all …]
H A Dufs-mediatek.c161 UIC_ARG_MIB(VS_SAVEPOWERCONTROL), &tmp); in ufs_mtk_cfg_unipro_cg()
167 UIC_ARG_MIB(VS_SAVEPOWERCONTROL), tmp); in ufs_mtk_cfg_unipro_cg()
170 UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), &tmp); in ufs_mtk_cfg_unipro_cg()
173 UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), tmp); in ufs_mtk_cfg_unipro_cg()
176 UIC_ARG_MIB(VS_SAVEPOWERCONTROL), &tmp); in ufs_mtk_cfg_unipro_cg()
181 UIC_ARG_MIB(VS_SAVEPOWERCONTROL), tmp); in ufs_mtk_cfg_unipro_cg()
184 UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), &tmp); in ufs_mtk_cfg_unipro_cg()
187 UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), tmp); in ufs_mtk_cfg_unipro_cg()
940 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_LOCALVERINFO), &ver); in ufs_mtk_get_controller_version()
1364 ufshcd_dme_get(hba, UIC_ARG_MIB(att), &value); in ufs_mtk_adjust_sync_length()
[all …]
H A Dufs-exynos.h276 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_OV_TM), true); in exynos_ufs_enable_ov_tm()
281 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_OV_TM), false); in exynos_ufs_disable_ov_tm()
286 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_MODE), true); in exynos_ufs_enable_dbg_mode()
291 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_MODE), false); in exynos_ufs_disable_dbg_mode()
H A Dufshcd-pci.c113 u32 attr = UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE); in ufs_intel_disable_lcc()
174 err = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY), in ufs_intel_lkf_pwr_change_notify()
191 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY), &granularity); in ufs_intel_lkf_apply_dev_quirks()
195 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY), &peer_granularity); in ufs_intel_lkf_apply_dev_quirks()
199 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate); in ufs_intel_lkf_apply_dev_quirks()
203 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &peer_pa_tactivate); in ufs_intel_lkf_apply_dev_quirks()
210 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE), new_peer_pa_tactivate); in ufs_intel_lkf_apply_dev_quirks()
H A Dufs-qcom.c1002 err = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_VS_CONFIG_REG1), in ufs_qcom_quirk_host_pa_saveconfigtime()
1008 return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_VS_CONFIG_REG1), in ufs_qcom_quirk_host_pa_saveconfigtime()
1016 err = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TX_HSG1_SYNC_LENGTH), in ufs_qcom_override_pa_tx_hsg1_sync_len()
1485 err = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_VS_CORE_CLK_40NS_CYCLES), &reg); in ufs_qcom_set_clk_40ns_cycles()
1492 return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_VS_CORE_CLK_40NS_CYCLES), reg); in ufs_qcom_set_clk_40ns_cycles()
1536 UIC_ARG_MIB(DME_VS_CORE_CLK_CTRL), in ufs_qcom_set_core_clk_ctrl()
1558 UIC_ARG_MIB(DME_VS_CORE_CLK_CTRL), in ufs_qcom_set_core_clk_ctrl()
1591 UIC_ARG_MIB(DME_VS_CORE_CLK_CTRL), in ufs_qcom_clk_scale_down_pre_change()
1599 UIC_ARG_MIB(DME_VS_CORE_CLK_CTRL), in ufs_qcom_clk_scale_down_pre_change()
/linux/drivers/ufs/core/
H A Dufshcd.c4097 UIC_ARG_MIB(PA_TXHSADAPTTYPE), in ufshcd_dme_configure_adapt()
4293 err = ufshcd_dme_get(hba, UIC_ARG_MIB(attr), &cfg); in ufshcd_dme_rmw()
4300 return ufshcd_dme_set(hba, UIC_ARG_MIB(attr), cfg); in ufshcd_dme_rmw()
4410 if (uic_cmd->argument1 != UIC_ARG_MIB(PA_PWRMODE) || in ufshcd_send_bsg_uic_cmd()
4436 .argument1 = UIC_ARG_MIB(PA_PWRMODE), in ufshcd_uic_change_pwr_mode()
4607 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES), in ufshcd_get_max_pwr_mode()
4609 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES), in ufshcd_get_max_pwr_mode()
4633 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx); in ufshcd_get_max_pwr_mode()
4635 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR), in ufshcd_get_max_pwr_mode()
4645 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), in ufshcd_get_max_pwr_mode()
[all …]
/linux/include/ufs/
H A Dufshci.h312 #define UIC_ARG_MIB(attr) UIC_ARG_MIB_SEL(attr, 0) macro
H A Dufshcd.h1426 return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0); in ufshcd_disable_host_tx_lcc()