Searched refs:TX_ENABLE (Results 1 – 6 of 6) sorted by relevance
402 writel(reg_val_GCR | TX_ENABLE, msp->registers + MSP_GCR); in flush_fifo_tx()505 writel(reg_val_GCR & ~TX_ENABLE, msp->registers + MSP_GCR); in disable_msp_tx()534 (~TX_ENABLE)), msp->registers + MSP_GCR); in disable_msp()569 enable_bit = TX_ENABLE; in ux500_msp_i2s_trigger()
44 #define TX_ENABLE 0x00000100 macro
136 TX_ENABLE = 9 << 11, enumerator 743 outw(TX_ENABLE, ioaddr + EL3_CMD); in el3_tx_timeout() 802 outw(TX_ENABLE, ioaddr + EL3_CMD); in el3_start_xmit() 867 outw(TX_ENABLE, in el3_interrupt() 1396 outw(TX_ENABLE, ioaddr + EL3_CMD); in el3_up()
71 #define TX_ENABLE BIT(TX_ENABLE_SHIFT) macro
403 val = TX_ENABLE; in tegra_admaif_start() 431 enable = TX_ENABLE; in tegra_admaif_stop()
1439 #define TX_ENABLE 0x80 macro