Searched refs:TIM_SAFE_ENABLE (Results 1 – 1 of 1) sorted by relevance
20 #define TIM_SAFE_ENABLE 0xf1d0dead macro971 REGV_WR32(VPU_37XX_CPU_SS_TIM_SAFE, TIM_SAFE_ENABLE); in wdt_disable_37xx()975 REGV_WR32(VPU_37XX_CPU_SS_TIM_SAFE, TIM_SAFE_ENABLE); in wdt_disable_37xx()988 REGV_WR32(VPU_40XX_CPU_SS_TIM_SAFE, TIM_SAFE_ENABLE); in wdt_disable_40xx()991 REGV_WR32(VPU_40XX_CPU_SS_TIM_SAFE, TIM_SAFE_ENABLE); in wdt_disable_40xx()