Searched refs:TEGRA210_CLK_XUSB_SS_DIV2 (Results 1 – 2 of 2) sorted by relevance
397 #define TEGRA210_CLK_XUSB_SS_DIV2 362 macro
2496 [tegra_clk_xusb_ss_div2] = { .dt_id = TEGRA210_CLK_XUSB_SS_DIV2, .present = true },3099 clks[TEGRA210_CLK_XUSB_SS_DIV2] = clk; in tegra210_periph_clk_init()