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Searched refs:TB_CFG_PORT (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/thunderbolt/
H A Dusb4.c190 if (tb_port_read(port, &val, TB_CFG_PORT, in usb4_switch_check_wakes()
220 if (tb_port_read(port, &val, TB_CFG_PORT, in link_is_usb4()
404 ret = tb_port_read(up, &val, TB_CFG_PORT, up->cap_usb4 + PORT_CS_18, 1); in usb4_switch_lane_bonding_possible()
441 ret = tb_port_read(port, &val, TB_CFG_PORT, in usb4_switch_set_wake()
462 ret = tb_port_write(port, &val, TB_CFG_PORT, in usb4_switch_set_wake()
1132 ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_4, 1); in usb4_port_unlock()
1137 return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_4, 1); in usb4_port_unlock()
1154 ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_5, 1); in usb4_port_hotplug_enable()
1159 return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_5, 1); in usb4_port_hotplug_enable()
1178 ret = tb_port_read(port, &val, TB_CFG_PORT, in usb4_port_reset()
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H A Dtmu.c172 ret = tb_port_read(port, &data, TB_CFG_PORT, port->cap_tmu + offset, 1); in tb_port_tmu_write()
179 return tb_port_write(port, &data, TB_CFG_PORT, in tb_port_tmu_write()
210 ret = tb_port_read(port, &val, TB_CFG_PORT, in tb_port_tmu_is_unidirectional()
223 ret = tb_port_read(port, &val, TB_CFG_PORT, in tb_port_tmu_is_enhanced()
240 ret = tb_port_read(port, &val, TB_CFG_PORT, in tb_port_tmu_enhanced_enable()
250 return tb_port_write(port, &val, TB_CFG_PORT, in tb_port_tmu_enhanced_enable()
265 ret = tb_port_read(port, &val, TB_CFG_PORT, in tb_port_set_tmu_mode_params()
275 ret = tb_port_write(port, &val, TB_CFG_PORT, in tb_port_set_tmu_mode_params()
280 ret = tb_port_read(port, &val, TB_CFG_PORT, in tb_port_set_tmu_mode_params()
290 return tb_port_write(port, &val, TB_CFG_PORT, in tb_port_set_tmu_mode_params()
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H A Dicm.c1898 ret = pcie2cio_read(icm, TB_CFG_PORT, port0, PHY_PORT_CS1, &val0); in icm_reset_phy_port()
1901 ret = pcie2cio_read(icm, TB_CFG_PORT, port1, PHY_PORT_CS1, &val1); in icm_reset_phy_port()
1915 ret = pcie2cio_write(icm, TB_CFG_PORT, port0, PHY_PORT_CS1, val0); in icm_reset_phy_port()
1920 ret = pcie2cio_write(icm, TB_CFG_PORT, port1, PHY_PORT_CS1, val1); in icm_reset_phy_port()
1927 ret = pcie2cio_read(icm, TB_CFG_PORT, port0, PHY_PORT_CS1, &val0); in icm_reset_phy_port()
1930 ret = pcie2cio_read(icm, TB_CFG_PORT, port1, PHY_PORT_CS1, &val1); in icm_reset_phy_port()
1935 ret = pcie2cio_write(icm, TB_CFG_PORT, port0, PHY_PORT_CS1, val0); in icm_reset_phy_port()
1940 return pcie2cio_write(icm, TB_CFG_PORT, port1, PHY_PORT_CS1, val1); in icm_reset_phy_port()
H A Ddebugfs.c279 return regs_write(port->sw, port, TB_CFG_PORT, user_buf, count, ppos); in port_regs_write()
1944 ret = tb_port_read(port, &data, TB_CFG_PORT, cap + offset + i, 1); in cap_show_by_dw()
1968 ret = tb_port_read(port, data, TB_CFG_PORT, cap + offset, in cap_show()
1996 ret = tb_port_read(port, &header, TB_CFG_PORT, cap, 1); in port_cap_show()
2043 ret = tb_port_read(port, (u32 *)&header + 1, TB_CFG_PORT, in port_cap_show()
2087 ret = tb_port_read(port, data, TB_CFG_PORT, 0, ARRAY_SIZE(data)); in port_basic_regs_show()
H A Dtb_msgs.h17 TB_CFG_PORT = 1, enumerator
H A Deeprom.c383 res = tb_port_read(port, &type, TB_CFG_PORT, 2, 1); in tb_drom_parse_entry_port()
H A Dctl.c1097 if (space == TB_CFG_PORT && in tb_cfg_get_error()
H A Dxdomain.c549 ret = tb_port_read(port, val, TB_CFG_PORT, in tb_xdp_link_state_status_response()
1301 ret = tb_port_read(port, &val, TB_CFG_PORT, port->cap_phy + LANE_ADP_CS_1, 1); in tb_xdomain_link_state_change()