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Searched refs:TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h10457 #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h13946 #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h16408 #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h15828 #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT 0x0 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h20158 #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT … macro
H A Dgc_9_1_sh_mask.h21465 #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h21395 #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h23461 #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h27423 #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h33753 #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h28088 #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h29946 #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h26360 #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT … macro