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Searched refs:TARGET_SD_CMU (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/phy/microchip/
H A Dsparx5_serdes.c940 cmu_tgt = sdx5_inst_get(priv, TARGET_SD_CMU, cmu_idx); in sparx5_cmu_apply_cfg()
1059 cmu_tgt = sdx5_inst_get(priv, TARGET_SD_CMU, cmu_idx); in sparx5_cmu_cfg()
1105 cmu_inst = sdx5_inst_get(priv, TARGET_SD_CMU, i); in sparx5_serdes_cmu_power_off()
2414 { TARGET_SD_CMU, 0x0 }, /* 0x610808000: sd_cmu_0 */
2415 { TARGET_SD_CMU + 1, 0x8000 }, /* 0x610810000: sd_cmu_1 */
2416 { TARGET_SD_CMU + 2, 0x10000 }, /* 0x610818000: sd_cmu_2 */
2417 { TARGET_SD_CMU + 3, 0x18000 }, /* 0x610820000: sd_cmu_3 */
2418 { TARGET_SD_CMU + 4, 0x20000 }, /* 0x610828000: sd_cmu_4 */
2419 { TARGET_SD_CMU + 5, 0x28000 }, /* 0x610830000: sd_cmu_5 */
2420 { TARGET_SD_CMU + 6, 0x30000 }, /* 0x610838000: sd_cmu_6 */
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H A Dsparx5_serdes_regs.h22 TARGET_SD_CMU = 248, enumerator
2111 #define SD_CMU_CMU_00(t) __REG(TARGET_SD_CMU, t, 14, 0, 0, 1, 20, 0, 0, 1, 4)
2138 #define SD_CMU_CMU_05(t) __REG(TARGET_SD_CMU, t, 14, 20, 0, 1, 72, 0, 0, 1, 4)
2154 __REG(TARGET_SD_CMU, t, 14, 20, 0, 1, 72, 4, 0, 1, 4)
2206 __REG(TARGET_SD_CMU, t, 14, 20, 0, 1, 72, 12, 0, 1, 4)
2239 #define SD_CMU_CMU_09(t) __REG(TARGET_SD_CMU, t, 14, 20, 0, 1, 72, 16, 0, 1, 4)
2266 #define SD_CMU_CMU_0D(t) __REG(TARGET_SD_CMU, t, 14, 20, 0, 1, 72, 32, 0, 1, 4)
2299 #define SD_CMU_CMU_1B(t) __REG(TARGET_SD_CMU, t, 14, 104, 0, 1, 20, 4, 0, 1, 4)
2308 #define SD_CMU_CMU_1F(t) __REG(TARGET_SD_CMU, t, 14, 124, 0, 1, 68, 0, 0, 1, 4)
2335 #define SD_CMU_CMU_30(t) __REG(TARGET_SD_CMU, t, 14, 192, 0, 1, 72, 0, 0, 1, 4)
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