Searched refs:SXGBE_DMA_CHA_TXCTL_REG (Results 1 – 2 of 2) sorted by relevance
56 reg_val = readl(ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cha_num)); in sxgbe_dma_channel_init()58 writel(reg_val, ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cha_num)); in sxgbe_dma_channel_init()100 tx_config = readl(ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cha_num)); in sxgbe_enable_dma_transmission()102 writel(tx_config, ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cha_num)); in sxgbe_enable_dma_transmission()124 tx_ctl_reg = readl(ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cnum)); in sxgbe_dma_start_tx()127 ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cnum)); in sxgbe_dma_start_tx()135 tx_ctl_reg = readl(ioaddr + SXGBE_DMA_CHA_TXCTL_REG(dma_cnum)); in sxgbe_dma_start_tx_queue()137 writel(tx_ctl_reg, ioaddr + SXGBE_DMA_CHA_TXCTL_REG(dma_cnum)); in sxgbe_dma_start_tx_queue()144 tx_ctl_reg = readl(ioaddr + SXGBE_DMA_CHA_TXCTL_REG(dma_cnum)); in sxgbe_dma_stop_tx_queue()146 writel(tx_ctl_reg, ioaddr + SXGBE_DMA_CHA_TXCTL_REG(dma_cnum)); in sxgbe_dma_stop_tx_queue()[all …]
316 #define SXGBE_DMA_CHA_TXCTL_REG(cha_num) \ macro