Searched refs:SUN9I_CPUS_PLL4_DIV_GET (Results 1 – 1 of 1) sorted by relevance
37 #define SUN9I_CPUS_PLL4_DIV_GET(reg) ((reg & SUN9I_CPUS_PLL4_DIV_MASK) >> \ macro61 parent_rate /= SUN9I_CPUS_PLL4_DIV_GET(reg) + 1; in sun9i_a80_cpus_clk_recalc_rate()