| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 210 {codeview::RegisterId::ST3, X86::ST3}, in initLLVMToSEHAndCVRegMapping() 219 {codeview::RegisterId::ST3, X86::FP3}, in initLLVMToSEHAndCVRegMapping()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/CodeView/ |
| H A D | CodeViewRegisters.def | 128 CV_REGISTER(ST3, 131)
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrMMX.td | 153 ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7] in
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| H A D | X86RegisterInfo.td | 448 def ST3 : X86Reg<"st(3)", 3>, DwarfRegNum<[36, 15, 14]>;
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| H A D | X86InstrCompiler.td | 483 ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7, 503 ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedFalkorDetails.td | 1008 (instregex "^ST3(i8|i16|i32|i64)$")>; 1019 (instregex "^ST3(i8|i16|i32|i64)_POST$")>;
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| H A D | AArch64SchedA64FX.td | 2554 def : InstRW<[A64FXWrite_ST3_BH], (instregex "^ST3[BH]")>; 2561 def : InstRW<[A64FXWrite_ST3_WD_RI], (instregex "^ST3[WD]$")>; 2568 def : InstRW<[A64FXWrite_ST3_WD_RR], (instregex "^ST3[WD]_I")>;
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| H A D | AArch64SchedA510.td | 1299 def : InstRW<[CortexA510VSt<25>], (instregex "^ST3[BHW]_IMM$")>; 1303 def : InstRW<[CortexA510VSt<25>], (instregex "^ST3[BHW]$")>;
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| H A D | AArch64SchedA320.td | 1321 def : InstRW<[CortexA320VSt<25>], (instregex "^ST3[BHW]_IMM$")>; 1325 def : InstRW<[CortexA320VSt<25>], (instregex "^ST3[BHW]$")>;
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| H A D | AArch64SchedKryoDetails.td | 1930 (instregex "ST3(Threev1d|(i8|i16|i32|i64))$")>; 1936 (instregex "ST3(Threev1d|(i8|i16|i32|i64))_POST$")>;
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| H A D | AArch64SchedNeoverseV1.td | 1938 def : InstRW<[V1Write_7c_5L01_5V], (instregex "^ST3[BHWD]_IMM$")>; 1941 def : InstRW<[V1Write_7c_5L01_5S_5V], (instregex "^ST3[BHWD]$")>;
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| H A D | AArch64SchedNeoverseN2.td | 2256 def : InstRW<[N2Write_7c_5L01_5V], (instregex "^ST3[BHWD]_IMM$")>; 2262 def : InstRW<[N2Write_7c_5L01_5S_5V], (instregex "^ST3[BWD]$")>;
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| H A D | AArch64SchedNeoverseN3.td | 2230 def : InstRW<[N3Write_4c_3L01_3V], (instregex "^ST3[BHW]_IMM$")>; 2236 def : InstRW<[N3Write_4c_3L01_3I_3V], (instregex "^ST3[BHW]$")>;
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| H A D | AArch64SchedNeoverseV2.td | 2753 def : InstRW<[V2Write_7c_9L01_9V01], (instregex "^ST3[BHWD]_IMM$")>; 2756 def : InstRW<[V2Write_7c_9L01_9S_9V01], (instregex "^ST3[BHWD]$")>;
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| H A D | AArch64InstrInfo.td | 8935 defm ST3 : SIMDSt3Multiple<"st3">; 9246 defm ST3 : SIMDStSingleB<0, 0b001, "st3", VecListThreeb, GPR64pi3>; 9247 defm ST3 : SIMDStSingleH<0, 0b011, 0, "st3", VecListThreeh, GPR64pi6>; 9248 defm ST3 : SIMDStSingleS<0, 0b101, 0b00, "st3", VecListThrees, GPR64pi12>; 9249 defm ST3 : SIMDStSingleD<0, 0b101, 0b01, "st3", VecListThreed, GPR64pi24>; 9258 defm ST3 : SIMDLdSt3SingleAliases<"st3">;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 1578 case 3: RegNo = X86::ST3; break; in ParseRegister()
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| /freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | arm_neon.td | 776 def ST3 : WInst<"vst3", "v*(3!)", "QUlQldQdPlQPlmQm">;
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