Searched refs:SRST_HDPTX0_LANE (Results 1 – 3 of 3) sorted by relevance
700 #define SRST_HDPTX0_LANE 613 macro
790 RK3588_PMU1CRU_RESET_OFFSET(SRST_HDPTX0_LANE, 3, 13),
2817 <&cru SRST_HDPTX0_LANE>, <&cru SRST_HDPTX0_ROPLL>,