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Searched refs:SQ_WAVE_TTMP5__DATA_MASK (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h10036 #define SQ_WAVE_TTMP5__DATA_MASK 0xffffffffL macro
H A Dgfx_7_2_sh_mask.h12613 #define SQ_WAVE_TTMP5__DATA_MASK 0xffffffff macro
H A Dgfx_8_1_sh_mask.h14897 #define SQ_WAVE_TTMP5__DATA_MASK 0xffffffff macro
H A Dgfx_8_0_sh_mask.h14499 #define SQ_WAVE_TTMP5__DATA_MASK 0xffffffff macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h28601 #define SQ_WAVE_TTMP5__DATA_MASK … macro
H A Dgc_9_1_sh_mask.h29811 #define SQ_WAVE_TTMP5__DATA_MASK … macro
H A Dgc_9_2_1_sh_mask.h30139 #define SQ_WAVE_TTMP5__DATA_MASK … macro
H A Dgc_9_4_3_sh_mask.h31510 #define SQ_WAVE_TTMP5__DATA_MASK … macro
H A Dgc_9_4_2_sh_mask.h32867 #define SQ_WAVE_TTMP5__DATA_MASK … macro
H A Dgc_11_5_0_sh_mask.h36537 #define SQ_WAVE_TTMP5__DATA_MASK … macro
H A Dgc_11_0_0_sh_mask.h41605 #define SQ_WAVE_TTMP5__DATA_MASK … macro
H A Dgc_12_0_0_sh_mask.h40497 #define SQ_WAVE_TTMP5__DATA_MASK … macro
H A Dgc_10_1_0_sh_mask.h42961 #define SQ_WAVE_TTMP5__DATA_MASK … macro
H A Dgc_11_0_3_sh_mask.h44647 #define SQ_WAVE_TTMP5__DATA_MASK … macro
H A Dgc_10_3_0_sh_mask.h48187 #define SQ_WAVE_TTMP5__DATA_MASK … macro