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Searched refs:SQ_WAVE_STATUS__PRIV_MASK (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9986 #define SQ_WAVE_STATUS__PRIV_MASK 0x00000020L macro
H A Dgfx_7_2_sh_mask.h12485 #define SQ_WAVE_STATUS__PRIV_MASK 0x20 macro
H A Dgfx_8_1_sh_mask.h14763 #define SQ_WAVE_STATUS__PRIV_MASK 0x20 macro
H A Dgfx_8_0_sh_mask.h14365 #define SQ_WAVE_STATUS__PRIV_MASK 0x20 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h28440 #define SQ_WAVE_STATUS__PRIV_MASK macro
H A Dgc_9_1_sh_mask.h29652 #define SQ_WAVE_STATUS__PRIV_MASK macro
H A Dgc_9_2_1_sh_mask.h29978 #define SQ_WAVE_STATUS__PRIV_MASK macro
H A Dgc_9_4_3_sh_mask.h31337 #define SQ_WAVE_STATUS__PRIV_MASK macro
H A Dgc_9_4_2_sh_mask.h32709 #define SQ_WAVE_STATUS__PRIV_MASK macro
H A Dgc_11_5_0_sh_mask.h36387 #define SQ_WAVE_STATUS__PRIV_MASK macro
H A Dgc_11_0_0_sh_mask.h41458 #define SQ_WAVE_STATUS__PRIV_MASK macro
H A Dgc_12_0_0_sh_mask.h40194 #define SQ_WAVE_STATUS__PRIV_MASK macro
H A Dgc_10_1_0_sh_mask.h42753 #define SQ_WAVE_STATUS__PRIV_MASK macro
H A Dgc_11_0_3_sh_mask.h44495 #define SQ_WAVE_STATUS__PRIV_MASK macro
H A Dgc_10_3_0_sh_mask.h47996 #define SQ_WAVE_STATUS__PRIV_MASK macro