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Searched refs:SQ_FIFO_SIZES__EXPORT_BUF_SIZE_MASK (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h8876 #define SQ_FIFO_SIZES__EXPORT_BUF_SIZE_MASK 0x00030000L macro
H A Dgfx_7_2_sh_mask.h11753 #define SQ_FIFO_SIZES__EXPORT_BUF_SIZE_MASK 0x30000 macro
H A Dgfx_8_1_sh_mask.h13953 #define SQ_FIFO_SIZES__EXPORT_BUF_SIZE_MASK 0x30000 macro
H A Dgfx_8_0_sh_mask.h13555 #define SQ_FIFO_SIZES__EXPORT_BUF_SIZE_MASK 0x30000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2164 #define SQ_FIFO_SIZES__EXPORT_BUF_SIZE_MASK macro
H A Dgc_9_1_sh_mask.h2012 #define SQ_FIFO_SIZES__EXPORT_BUF_SIZE_MASK macro
H A Dgc_9_2_1_sh_mask.h2035 #define SQ_FIFO_SIZES__EXPORT_BUF_SIZE_MASK macro
H A Dgc_9_4_3_sh_mask.h2173 #define SQ_FIFO_SIZES__EXPORT_BUF_SIZE_MASK macro
H A Dgc_9_4_2_sh_mask.h25456 #define SQ_FIFO_SIZES__EXPORT_BUF_SIZE_MASK macro