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Searched refs:SQ_DSM_CNTL__SPI_BACKPRESSURE_1_MASK (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_sh_mask.h13963 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_1_MASK 0x8 macro
H A Dgfx_8_0_sh_mask.h13565 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_1_MASK 0x8 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2186 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_1_MASK … macro
H A Dgc_9_1_sh_mask.h2034 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_1_MASK … macro
H A Dgc_9_2_1_sh_mask.h2057 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_1_MASK … macro
H A Dgc_9_4_2_sh_mask.h25478 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_1_MASK … macro
H A Dgc_11_0_0_sh_mask.h7062 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_1_MASK … macro
H A Dgc_12_0_0_sh_mask.h23762 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_1_MASK … macro
H A Dgc_10_1_0_sh_mask.h7738 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_1_MASK … macro
H A Dgc_11_0_3_sh_mask.h7919 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_1_MASK … macro
H A Dgc_10_3_0_sh_mask.h8073 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_1_MASK … macro