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Searched refs:SQ_DPP_ROW_SL5 (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_enum.h3550 #define SQ_DPP_ROW_SL5 0x105 macro
H A Dgfx_8_1_enum.h3568 #define SQ_DPP_ROW_SL5 0x105 macro
/linux/drivers/gpu/drm/amd/include/
H A Dvega10_enum.h18180 #define SQ_DPP_ROW_SL5 0x00000105 macro