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Searched refs:SQ_DEBUG_STS_GLOBAL2__FIFO_LEVEL_GFX1_MASK (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h8802 #define SQ_DEBUG_STS_GLOBAL2__FIFO_LEVEL_GFX1_MASK 0x0000ff00L macro
H A Dgfx_7_2_sh_mask.h12637 #define SQ_DEBUG_STS_GLOBAL2__FIFO_LEVEL_GFX1_MASK 0xff00 macro
H A Dgfx_8_1_sh_mask.h14921 #define SQ_DEBUG_STS_GLOBAL2__FIFO_LEVEL_GFX1_MASK 0xff00 macro
H A Dgfx_8_0_sh_mask.h14523 #define SQ_DEBUG_STS_GLOBAL2__FIFO_LEVEL_GFX1_MASK 0xff00 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h28360 #define SQ_DEBUG_STS_GLOBAL2__FIFO_LEVEL_GFX1_MASK 0x0000ff00L macro
H A Dgc_9_1_sh_mask.h29577 #define SQ_DEBUG_STS_GLOBAL2__FIFO_LEVEL_GFX1_MASK 0x0000ff00L macro
H A Dgc_9_2_1_sh_mask.h29899 #define SQ_DEBUG_STS_GLOBAL2__FIFO_LEVEL_GFX1_MASK 0x0000ff00L macro
H A Dgc_9_4_2_sh_mask.h25586 #define SQ_DEBUG_STS_GLOBAL2__FIFO_LEVEL_GFX1_MASK … macro
H A Dgc_10_1_0_sh_mask.h42675 #define SQ_DEBUG_STS_GLOBAL2__FIFO_LEVEL_GFX1_MASK 0x0000ff00L macro
H A Dgc_10_3_0_sh_mask.h47917 #define SQ_DEBUG_STS_GLOBAL2__FIFO_LEVEL_GFX1_MASK 0x0000ff00L macro