Searched refs:SPRN_L1CSR1 (Results 1 – 4 of 4) sorted by relevance
22 mfspr r0, SPRN_L1CSR127 mtspr SPRN_L1CSR1, r0 /* Enable I-Cache */
247 tmp = mfspr(SPRN_L1CSR1); in flush_instruction_cache()249 mtspr(SPRN_L1CSR1, tmp); in flush_instruction_cache()
252 case SPRN_L1CSR1: in kvmppc_core_emulate_mtspr_e500()381 case SPRN_L1CSR1: in kvmppc_core_emulate_mfspr_e500()
166 #define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */ macro