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Searched refs:SPI_WCL_PIPE_PERCENT_CS3__VALUE_MASK (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h8845 #define SPI_WCL_PIPE_PERCENT_CS3__VALUE_MASK 0x1f macro
H A Dgfx_8_1_sh_mask.h10861 #define SPI_WCL_PIPE_PERCENT_CS3__VALUE_MASK 0x7f macro
H A Dgfx_8_0_sh_mask.h10463 #define SPI_WCL_PIPE_PERCENT_CS3__VALUE_MASK 0x7f macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12309 #define SPI_WCL_PIPE_PERCENT_CS3__VALUE_MASK … macro
H A Dgc_9_1_sh_mask.h13689 #define SPI_WCL_PIPE_PERCENT_CS3__VALUE_MASK … macro
H A Dgc_9_2_1_sh_mask.h13485 #define SPI_WCL_PIPE_PERCENT_CS3__VALUE_MASK … macro
H A Dgc_9_4_2_sh_mask.h24919 #define SPI_WCL_PIPE_PERCENT_CS3__VALUE_MASK … macro
H A Dgc_11_5_0_sh_mask.h13891 #define SPI_WCL_PIPE_PERCENT_CS3__VALUE_MASK … macro
H A Dgc_11_0_0_sh_mask.h17197 #define SPI_WCL_PIPE_PERCENT_CS3__VALUE_MASK … macro
H A Dgc_12_0_0_sh_mask.h27220 #define SPI_WCL_PIPE_PERCENT_CS3__VALUE_MASK … macro
H A Dgc_10_1_0_sh_mask.h19690 #define SPI_WCL_PIPE_PERCENT_CS3__VALUE_MASK … macro
H A Dgc_11_0_3_sh_mask.h19440 #define SPI_WCL_PIPE_PERCENT_CS3__VALUE_MASK … macro
H A Dgc_10_3_0_sh_mask.h18051 #define SPI_WCL_PIPE_PERCENT_CS3__VALUE_MASK … macro