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Searched refs:SPI_PERFCOUNTER_BINS__BIN3_MIN__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7681 #define SPI_PERFCOUNTER_BINS__BIN3_MIN__SHIFT 0x00000018 macro
H A Dgfx_7_2_sh_mask.h9220 #define SPI_PERFCOUNTER_BINS__BIN3_MIN__SHIFT 0x18 macro
H A Dgfx_8_1_sh_mask.h11338 #define SPI_PERFCOUNTER_BINS__BIN3_MIN__SHIFT 0x18 macro
H A Dgfx_8_0_sh_mask.h10940 #define SPI_PERFCOUNTER_BINS__BIN3_MIN__SHIFT 0x18 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21638 #define SPI_PERFCOUNTER_BINS__BIN3_MIN__SHIFT … macro
H A Dgc_9_1_sh_mask.h22945 #define SPI_PERFCOUNTER_BINS__BIN3_MIN__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h22912 #define SPI_PERFCOUNTER_BINS__BIN3_MIN__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h25107 #define SPI_PERFCOUNTER_BINS__BIN3_MIN__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h16727 #define SPI_PERFCOUNTER_BINS__BIN3_MIN__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h27685 #define SPI_PERFCOUNTER_BINS__BIN3_MIN__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h31836 #define SPI_PERFCOUNTER_BINS__BIN3_MIN__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h35847 #define SPI_PERFCOUNTER_BINS__BIN3_MIN__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h31583 #define SPI_PERFCOUNTER_BINS__BIN3_MIN__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h34334 #define SPI_PERFCOUNTER_BINS__BIN3_MIN__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h29951 #define SPI_PERFCOUNTER_BINS__BIN3_MIN__SHIFT … macro