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Searched refs:SPI_PERFCOUNTER1_SELECT1__PERF_SEL2_MASK (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7628 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL2_MASK 0x000003ffL macro
H A Dgfx_7_2_sh_mask.h9191 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL2_MASK 0x3ff macro
H A Dgfx_8_1_sh_mask.h11309 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL2_MASK 0x3ff macro
H A Dgfx_8_0_sh_mask.h10911 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL2_MASK 0x3ff macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21603 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL2_MASK … macro
H A Dgc_9_1_sh_mask.h22910 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL2_MASK … macro
H A Dgc_9_2_1_sh_mask.h22877 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL2_MASK … macro
H A Dgc_9_4_3_sh_mask.h25072 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL2_MASK … macro
H A Dgc_9_4_2_sh_mask.h16692 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL2_MASK … macro
H A Dgc_11_5_0_sh_mask.h27650 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL2_MASK … macro
H A Dgc_11_0_0_sh_mask.h31801 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL2_MASK … macro
H A Dgc_12_0_0_sh_mask.h35800 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL2_MASK … macro
H A Dgc_10_1_0_sh_mask.h31548 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL2_MASK … macro
H A Dgc_11_0_3_sh_mask.h34299 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL2_MASK … macro
H A Dgc_10_3_0_sh_mask.h29916 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL2_MASK … macro