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Searched refs:SPI_CONFIG_CNTL__GPR_WRITE_PRIORITY_MASK (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7498 #define SPI_CONFIG_CNTL__GPR_WRITE_PRIORITY_MASK 0x001fffffL macro
H A Dgfx_7_2_sh_mask.h9119 #define SPI_CONFIG_CNTL__GPR_WRITE_PRIORITY_MASK 0x1fffff macro
H A Dgfx_8_1_sh_mask.h11227 #define SPI_CONFIG_CNTL__GPR_WRITE_PRIORITY_MASK 0x1fffff macro
H A Dgfx_8_0_sh_mask.h10829 #define SPI_CONFIG_CNTL__GPR_WRITE_PRIORITY_MASK 0x1fffff macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h20359 #define SPI_CONFIG_CNTL__GPR_WRITE_PRIORITY_MASK … macro
H A Dgc_9_1_sh_mask.h21666 #define SPI_CONFIG_CNTL__GPR_WRITE_PRIORITY_MASK … macro
H A Dgc_9_2_1_sh_mask.h21596 #define SPI_CONFIG_CNTL__GPR_WRITE_PRIORITY_MASK … macro
H A Dgc_9_4_2_sh_mask.h13794 #define SPI_CONFIG_CNTL__GPR_WRITE_PRIORITY_MASK … macro
H A Dgc_11_5_0_sh_mask.h23724 #define SPI_CONFIG_CNTL__GPR_WRITE_PRIORITY_MASK … macro
H A Dgc_11_0_0_sh_mask.h27686 #define SPI_CONFIG_CNTL__GPR_WRITE_PRIORITY_MASK … macro
H A Dgc_12_0_0_sh_mask.h33790 #define SPI_CONFIG_CNTL__GPR_WRITE_PRIORITY_MASK … macro
H A Dgc_10_1_0_sh_mask.h8440 #define SPI_CONFIG_CNTL__GPR_WRITE_PRIORITY_MASK … macro
H A Dgc_11_0_3_sh_mask.h30209 #define SPI_CONFIG_CNTL__GPR_WRITE_PRIORITY_MASK … macro