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Searched refs:SPI_CONFIG_CNTL_1__CSG_PWR_SAVE_DISABLE_MASK (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h20389 #define SPI_CONFIG_CNTL_1__CSG_PWR_SAVE_DISABLE_MASK … macro
H A Dgc_9_1_sh_mask.h21696 #define SPI_CONFIG_CNTL_1__CSG_PWR_SAVE_DISABLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h21626 #define SPI_CONFIG_CNTL_1__CSG_PWR_SAVE_DISABLE_MASK … macro
H A Dgc_9_4_3_sh_mask.h23746 #define SPI_CONFIG_CNTL_1__CSG_PWR_SAVE_DISABLE_MASK … macro
H A Dgc_9_4_2_sh_mask.h13824 #define SPI_CONFIG_CNTL_1__CSG_PWR_SAVE_DISABLE_MASK … macro
H A Dgc_11_5_0_sh_mask.h23753 #define SPI_CONFIG_CNTL_1__CSG_PWR_SAVE_DISABLE_MASK … macro
H A Dgc_11_0_0_sh_mask.h27715 #define SPI_CONFIG_CNTL_1__CSG_PWR_SAVE_DISABLE_MASK … macro
H A Dgc_12_0_0_sh_mask.h33819 #define SPI_CONFIG_CNTL_1__CSG_PWR_SAVE_DISABLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h8499 #define SPI_CONFIG_CNTL_1__CSG_PWR_SAVE_DISABLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h30238 #define SPI_CONFIG_CNTL_1__CSG_PWR_SAVE_DISABLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h8841 #define SPI_CONFIG_CNTL_1__CSG_PWR_SAVE_DISABLE_MASK … macro