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Searched refs:SPI_CDBG_SYS_CS0__PIPE0__SHIFT (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h8820 #define SPI_CDBG_SYS_CS0__PIPE0__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h10820 #define SPI_CDBG_SYS_CS0__PIPE0__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h10422 #define SPI_CDBG_SYS_CS0__PIPE0__SHIFT 0x0 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12263 #define SPI_CDBG_SYS_CS0__PIPE0__SHIFT macro
H A Dgc_9_2_1_sh_mask.h13439 #define SPI_CDBG_SYS_CS0__PIPE0__SHIFT macro
H A Dgc_9_4_3_sh_mask.h15788 #define SPI_CDBG_SYS_CS0__PIPE0__SHIFT macro
H A Dgc_12_0_0_sh_mask.h32649 #define SPI_CDBG_SYS_CS0__PIPE0__SHIFT macro
H A Dgc_11_0_3_sh_mask.h27325 #define SPI_CDBG_SYS_CS0__PIPE0__SHIFT macro