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Searched refs:SPI_ARB_CYCLES_1__TS2_DURATION__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7443 #define SPI_ARB_CYCLES_1__TS2_DURATION__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h8790 #define SPI_ARB_CYCLES_1__TS2_DURATION__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h10790 #define SPI_ARB_CYCLES_1__TS2_DURATION__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h10392 #define SPI_ARB_CYCLES_1__TS2_DURATION__SHIFT 0x0 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12230 #define SPI_ARB_CYCLES_1__TS2_DURATION__SHIFT … macro
H A Dgc_9_1_sh_mask.h13656 #define SPI_ARB_CYCLES_1__TS2_DURATION__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h13406 #define SPI_ARB_CYCLES_1__TS2_DURATION__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h15755 #define SPI_ARB_CYCLES_1__TS2_DURATION__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h24886 #define SPI_ARB_CYCLES_1__TS2_DURATION__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h13862 #define SPI_ARB_CYCLES_1__TS2_DURATION__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h17168 #define SPI_ARB_CYCLES_1__TS2_DURATION__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h27191 #define SPI_ARB_CYCLES_1__TS2_DURATION__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h19657 #define SPI_ARB_CYCLES_1__TS2_DURATION__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h19411 #define SPI_ARB_CYCLES_1__TS2_DURATION__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h18022 #define SPI_ARB_CYCLES_1__TS2_DURATION__SHIFT … macro