Searched refs:SOR_DP_LINKCTL0 (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/gpu/drm/tegra/ |
| H A D | sor.c | 895 value = tegra_sor_readl(sor, SOR_DP_LINKCTL0); in tegra_sor_dp_link_configure()
902 tegra_sor_writel(sor, value, SOR_DP_LINKCTL0); in tegra_sor_dp_link_configure()
1254 value = tegra_sor_readl(sor, SOR_DP_LINKCTL0); in tegra_sor_apply_config()
1257 tegra_sor_writel(sor, value, SOR_DP_LINKCTL0); in tegra_sor_apply_config()
1615 DEBUGFS_REG32(SOR_DP_LINKCTL0),
2360 value = tegra_sor_readl(sor, SOR_DP_LINKCTL0); in tegra_sor_hdmi_enable()
2363 tegra_sor_writel(sor, value, SOR_DP_LINKCTL0); in tegra_sor_hdmi_enable()
2888 value = tegra_sor_readl(sor, SOR_DP_LINKCTL0); in tegra_sor_dp_enable()
2890 tegra_sor_writel(sor, value, SOR_DP_LINKCTL0); in tegra_sor_dp_enable()
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| H A D | sor.h | 228 #define SOR_DP_LINKCTL0 0x4c macro
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