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Searched refs:SOCFPGA_PLL_DIVF_MASK (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/clk/socfpga/
H A Dclk-pll.c26 #define SOCFPGA_PLL_DIVF_MASK 0x0000FFF8 macro
51 divf = (reg & SOCFPGA_PLL_DIVF_MASK) >> SOCFPGA_PLL_DIVF_SHIFT; in clk_pll_recalc_rate()