Searched refs:SOCFPGA_AGILEX_PLL_MDIV_MASK (Results 1 – 1 of 1) sorted by relevance
26 #define SOCFPGA_AGILEX_PLL_MDIV_MASK 0x000003FF macro76 mdiv = reg & SOCFPGA_AGILEX_PLL_MDIV_MASK; in agilex_clk_pll_recalc_rate()