Searched refs:SMU_SCLK_DPM_STATE_0_PG_CNTL (Results 1 – 2 of 2) sorted by relevance
73 #define SMU_SCLK_DPM_STATE_0_PG_CNTL 0x1f014 macro
558 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_PG_CNTL + ix); in trinity_set_divider_value()561 WREG32_SMC(SMU_SCLK_DPM_STATE_0_PG_CNTL + ix, value); in trinity_set_divider_value()