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Searched refs:SMU_SCLK_DPM_STATE_0_CNTL_0 (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dtrinity_dpm.h28 #define TRINITY_SIZEOF_DPM_STATE_TABLE (SMU_SCLK_DPM_STATE_1_CNTL_0 - SMU_SCLK_DPM_STATE_0_CNTL_0)
H A Dtrinity_dpm.c548 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix); in trinity_set_divider_value()
551 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value); in trinity_set_divider_value()
595 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix); in trinity_set_vid()
598 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value); in trinity_set_vid()
600 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix); in trinity_set_vid()
603 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value); in trinity_set_vid()
691 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix); in trinity_power_level_enable_disable()
695 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value); in trinity_power_level_enable_disable()
H A Dtrinityd.h34 #define SMU_SCLK_DPM_STATE_0_CNTL_0 0x1f000 macro