Searched refs:SLCR_FPGA0_CLK_CTRL (Results 1 – 1 of 1) sorted by relevance
40 #define SLCR_FPGA0_CLK_CTRL (zynq_clkc_base + 0x70) macro355 SLCR_FPGA0_CLK_CTRL + 0x10 * (i - fclk0), in zynq_clk_setup()